Xuguang Guan

According to our database1, Xuguang Guan authored at least 8 papers between 2009 and 2017.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Links

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Bibliography

2017
A new countermeasure against side channel attack for HMAC-SM3 hardware.
Proceedings of the 12th IEEE International Conference on ASIC, 2017

The configurable current flattening circuit for DPA countermeasures.
Proceedings of the 12th IEEE International Conference on ASIC, 2017

2016
Asymmetric multiprocessing for motion control based on Zynq SoC.
Proceedings of the 2016 International Conference on Field-Programmable Technology, 2016

2010
High Speed Multi-Resource Arbiter with Active Virtual Channel Allocation for Network on Chips.
J. Circuits Syst. Comput., 2010

An asynchronous low latency ordered arbiter for network on chips.
Proceedings of the Sixth International Conference on Natural Computation, 2010

Performance Analysis of Low Power Null Convention Logic Units with Power Cutoff.
Proceedings of the 2010 Asia-Pacific Conference on Wearable Computing Systems, 2010

2009
A GALS Delay-insensitive Self-timed Wrapper for Network on Chips.
Proceedings of the 2009 Pacific-Asia Conference on Circuits, Communications and Systems, 2009

A Novel GALS Single-Track Protocol Asynchronous Communication Circuits.
Proceedings of the 2009 Pacific-Asia Conference on Circuits, Communications and Systems, 2009


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