Yang Liu

According to our database1, Yang Liu authored at least 8 papers between 2006 and 2010.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

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Bibliography

2010
Computation Error Analysis in Digital Signal Processing Systems With Overscaled Supply Voltage.
IEEE Trans. Very Large Scale Integr. Syst., 2010

Exploiting three-dimensional (3D) memory stacking to improve image data access efficiency for motion estimation accelerators.
Signal Process. Image Commun., 2010

Design of low-power variation tolerant signal processing systems with adaptive finite word-length configuration.
Proceedings of the 11th International Symposium on Quality of Electronic Design (ISQED 2010), 2010

2009
Design of Voltage Overscaled Low-Power Trellis Decoders in Presence of Process Variations.
IEEE Trans. Very Large Scale Integr. Syst., 2009

2008
Energy-efficient soft-output trellis decoder design using trellis quasi-reduction and importance-aware clock skew scheduling.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

2007
Soft Clock Skew Scheduling for Variation-Tolerant Signal Processing Circuits: A Case Study of Viterbi Decoders.
Proceedings of the 8th International Symposium on Quality of Electronic Design (ISQED 2007), 2007

On the selection of arithmetic unit structure in voltage overscaled soft digital signal processing.
Proceedings of the 2007 International Symposium on Low Power Electronics and Design, 2007

2006
Low Power Trellis Decoder with Overscaled Supply Voltage.
Proceedings of the IEEE Workshop on Signal Processing Systems, 2006


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