Yang Su

According to our database, Yang Su authored at least 21 papers between 2008 and 2025.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2025

A Scalable and Efficient Architecture for Binary Polynomial Multiplication in BIKE Utilizing Inter-/Inner-Wise Sparsity and Block-by-Block Pipeline.

Jia Hou, Jianfei Wang, Yishuo Meng, Fahong Zhang, Yang Su, Chen Yang

IEEE Trans. Very Large Scale Integr. Syst., May, 2025

A Reconfigurable and Area-Efficient Polynomial Multiplier Using a Novel In-Place Constant-Geometry NTT/INTT and Conflict-Free Memory Mapping Scheme.

Jianfei Wang, Chen Yang, Yishuo Meng, Fahong Zhang, Jia Hou, Siwei Xiang, Yang Su

IEEE Trans. Circuits Syst. I Regul. Pap., March, 2025

A Scalable and Efficient NTT/INTT Architecture Using Group-Based Pairwise Memory Access and Fast Interstage Reordering.

Zihang Wang, Yushu Yang, Jianfei Wang, Jia Hou, Yang Su, Chen Yang

IEEE Trans. Very Large Scale Integr. Syst., February, 2025

A Compact and Efficient Hardware Accelerator for RNS-CKKS En/Decoding and En/Decryption.

Jianfei Wang, Chen Yang, Jia Hou, Fahong Zhang, Yishuo Meng, Yang Su, Leibo Liu

IEEE Trans. Circuits Syst. II Express Briefs, January, 2025

An Efficient and Parallelism-Scalable Large Integer Multiplier Architecture Using Least-Positive Form and Winograd Fast Algorithm.

Jianfei Wang, Jia Hou, Fahong Zhang, Yishuo Meng, Yang Su, Chen Yang

IEEE Trans. Circuits Syst. II Express Briefs, January, 2025

Low Multiplicative Depth Polynomial Evaluation Architectures for Homomorphic Encrypted Data.

Jianfei Wang, Jia Hou, Fahong Zhang, Yishuo Meng, Yang Su, Chen Yang

Proceedings of the 30th Asia and South Pacific Design Automation Conference, 2025

2024

A Lightweight and Efficient Encryption/Decryption Coprocessor for RLWE-Based Cryptography.

Yushu Yang, Zihang Wang, Jianfei Wang, Jia Hou, Yang Su, Chen Yang

IEEE Trans. Circuits Syst. II Express Briefs, December, 2024

A High-Throughput and Scalable Schoolbook Polynomial Multiplier for Accelerating Saber on FPGA Using a Novel Winograd-Based Architecture.

Jianfei Wang, Chen Yang, Fahong Zhang, Jia Hou, Yishuo Meng, Siwei Xiang, Yang Su

IEEE Trans. Circuits Syst. II Express Briefs, April, 2024

A High-Throughput Toom-Cook-4 Polynomial Multiplier for Lattice-Based Cryptography Using a Novel Winograd-Schoolbook Algorithm.

Jianfei Wang, Chen Yang, Fahong Zhang, Yishuo Meng, Siwei Xiang, Yang Su

IEEE Trans. Circuits Syst. I Regul. Pap., January, 2024

Sitting Posture Recognition Based on the Computer's Camera.

Songyin Zhao, Yang Su

Proceedings of the 2024 2nd Asia Conference on Computer Vision, 2024

2023

TCPM: A Reconfigurable and Efficient Toom-Cook-Based Polynomial Multiplier Over Rings Using a Novel Compressed Postprocessing Algorithm.

Jianfei Wang, Chen Yang, Fahong Zhang, Yishuo Meng, Yang Su

IEEE Trans. Very Large Scale Integr. Syst., August, 2023

2022

A Highly Unified Reconfigurable Multicore Architecture to Speed Up NTT/INTT for Homomorphic Polynomial Multiplication.

Yang Su, Bai-Long Yang, Chen Yang, Zepeng Yang, Yi-Wei Liu

IEEE Trans. Very Large Scale Integr. Syst., 2022

ReMCA: A Reconfigurable Multi-Core Architecture for Full RNS Variant of BFV Homomorphic Evaluation.

Yang Su, Bai-Long Yang, Chen Yang, Songyin Zhao

IEEE Trans. Circuits Syst. I Regul. Pap., 2022

2021

High-flexible hardware and instruction of composite Galois field multiplication targeted at symmetric crypto processor.

Yang Su, Bai-Long Yang, Chen Yang, Jing-Yuan He

J. Ambient Intell. Humaniz. Comput., 2021

A Lightweight Full Homomorphic Encryption Scheme on Fully-connected Layer for CNN Hardware Accelerator achieving Security Inference.

Chen Yang, Zepeng Yang, Jia Hou, Yang Su

Proceedings of the 28th IEEE International Conference on Electronics, 2021

2020

FPGA-Based Hardware Accelerator for Leveled Ring-LWE Fully Homomorphic Encryption.

Yang Su, Bailong Yang, Chen Yang, Luogeng Tian

IEEE Access, 2020

A Survey of Personalized Recommendation Based on Machine Learning Algorithms.

Luogeng Tian, Bailong Yang, Xinli Yin, Yang Su

Proceedings of the EITCE 2020: 4th International Conference on Electronic Information Technology and Computer Engineering, Xiamen, China, 6 November, 2020, 2020

2019

A high security and efficiency protection of confidentiality and integrity for off-chip memory.

Yang Su, Junwei Shen, Min-Qing Zhang

J. Ambient Intell. Humaniz. Comput., 2019

2009

Further Study on Proxy Authorization and Its Scheme.

Xuanwu Zhou, Yang Su, Ping Wei

Proceedings of the Complex Sciences, 2009

2008

Approach on Aspect-Oriented Software Reverse Engineering at Requirements Level.

Yang Su, Xuan-Wu Zhou, Min-Qing Zhang

Proceedings of the International Conference on Computer Science and Software Engineering, 2008

Research on Modeling Traversing Features in Concurrent Software System.

Yang Su, Xuan-Wu Zhou, Min-Qing Zhang

Proceedings of the International Conference on Computer Science and Software Engineering, 2008