Yang Yang

Affiliations:

Realsil Microelectronics, Suzhou, China
Xi'an Jiaotong University, School of Electronic and Information Engineering, Xi'an, China (until 2015)

According to our database¹, Yang Yang authored at least 4 papers between 2013 and 2026.

Collaborative distances:

Dijkstra number² of five.
Erdős number³ of four.

Timeline

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Book In proceedings Article PhD thesis Dataset Other

Bibliography

2026

A 28 nm 1.3 TFLOPS/mm<sup>2</sup> Floating-Point SRAM-Based CIM Macro With Asynchronous Normalization and Parallel Sorting Alignment for AI-Edge Chip.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., March, 2026

2019

Architectural Exploration to Address the Reliability Challenges for ReRAM-Based Buffer in SSD.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. I Regul. Pap., 2019

2015

An experimental study on the potential use of ReRAM as SSD buffer.

[BibT_eX]

[DOI]

Proceedings of the 2015 IEEE 11th International Conference on ASIC, 2015

2013

Categorization of Multiple Objects in a Scene Using a Biased Sampling Strategy.

[BibT_eX]

[DOI]

Int. J. Comput. Vis., 2013

Yang Yang

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Bibliography

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