Yaru Yan

Orcid: 0000-0002-2331-2459

According to our database1, Yaru Yan authored at least 5 papers between 2008 and 2019.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2019
Model recovery for Hammerstein systems using the hierarchical orthogonal matching pursuit method.
J. Comput. Appl. Math., 2019

2018
Instrumental Variable-Based OMP Identification Algorithm for Hammerstein Systems.
Complex., 2018

2014
A Fast Application-Based Supply Voltage Optimization Method for Dual Voltage FPGA.
IEEE Trans. Very Large Scale Integr. Syst., 2014

2011
A chip-level path-delay-distribution based Dual-VDD method for low power FPGA (abstract only).
Proceedings of the ACM/SIGDA 19th International Symposium on Field Programmable Gate Arrays, 2011

2008
Pure logic CMOS based embedded Non-Volatile Random Access Memory for low power RFID application.
Proceedings of the IEEE 2008 Custom Integrated Circuits Conference, 2008


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