Ye Zhang

Orcid: 0000-0001-7783-6584

Affiliations:

RWTH Aachen University, Germany

According to our database¹, Ye Zhang authored at least 18 papers between 2011 and 2018.

Collaborative distances:

Dijkstra number² of five.
Erdős number³ of five.

Timeline

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In proceedings

Article

PhD thesis

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Other

Bibliography

2018

A multistandard, triple band wireless transceiver in a 130 nm CMOS technology with integrated PAs for IoT applications.

[BibT_eX]

[DOI]

Proceedings of the 2018 IEEE Radio and Wireless Symposium, 2018

2016

A high efficiency straightforward design and verification methodology for PLL systems.

[BibT_eX]

[DOI]

Proceedings of the IEEE 59th International Midwest Symposium on Circuits and Systems, 2016

A 80 nW, 32 kHz charge-pump based ultra low power oscillator with temperature compensation.

[BibT_eX]

[DOI]

Proceedings of the ESSCIRC Conference 2016: 42<sup>nd</sup> European Solid-State Circuits Conference, 2016

2014

A Low-Power Low-Complexity Multi-Standard Digital Receiver for Joint Clock Recovery and Carrier Frequency Offset Calibration.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. I Regul. Pap., 2014

A low-complexity low-spurs digital architecture for wideband PLL applications.

[BibT_eX]

[DOI]

Ye Zhang

Ralf Wunderlich

Stefan Heinen

Microelectron. J., 2014

A low complexity multi standard dual band CMOS polar transmitter for smart utility networks.

[BibT_eX]

[DOI]

Proceedings of the 27th IEEE International System-on-Chip Conference, 2014

Compensating imperfections in RF-DAC based transmitters using LUT-based predistortion.

[BibT_eX]

[DOI]

Proceedings of the 27th IEEE International System-on-Chip Conference, 2014

Design of a low power multistandard transceiver chain based on current-reuse VCO.

[BibT_eX]

[DOI]

Proceedings of the 27th IEEE International System-on-Chip Conference, 2014

A 1.2V, 2.7mA receiver front-end for bluetooth low energy applications.

[BibT_eX]

[DOI]

Proceedings of the 2014 IEEE Radio and Wireless Symposium, 2014

A SystemC Virtual Prototyping based Methodology for Multi-Standard SoC Functional Verification.

[BibT_eX]

[DOI]

Proceedings of the 51st Annual Design Automation Conference 2014, 2014

An HDL-Based System Design Methodology for Multistandard RF SoC's.

[BibT_eX]

[DOI]

Proceedings of the 51st Annual Design Automation Conference 2014, 2014

2013

A Novel Low-Effort Demodulator for Low Power Short Range Wireless Transceivers.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. I Regul. Pap., 2013

Low complexity image rejection demodulator for bluetooth LE applications.

[BibT_eX]

[DOI]

Ye Zhang

Ralf Wunderlich

Stefan Heinen

Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

Low-effort high-performance viterbi-based receiver for Bluetooth LE applications.

[BibT_eX]

[DOI]

Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

A digital centric transmitter architecture with arbitrary ratio baseband-to-LO upsampling.

[BibT_eX]

[DOI]

Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

A 1.7mW quadrature bandpass ΔΣ ADC with 1MHz BW and 60dB DR at 1MHz IF.

[BibT_eX]

[DOI]

Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

2012

An ultra low power frequency synthesizer based on multiphase fractional frequency divider.

[BibT_eX]

[DOI]

Ye Zhang

Ralf Wunderlich

Stefan Heinen

Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

2011

A wide-frequency-range fractional-N synthesizer for clock generation in 65nm CMOS.

[BibT_eX]

[DOI]

Proceedings of the 18th IEEE International Conference on Electronics, Circuits and Systems, 2011

Ye Zhang

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