Yee-Yang Tee

According to our database, Yee-Yang Tee authored at least 4 papers between 2022 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2024

Integrated Circuit Mask-Generative Adversarial Network for Circuit Annotation With Targeted Data Augmentation.

Yee-Yang Tee, Deruo Cheng, Yiqiong Shi, Tong Lin, Bah-Hwee Gwee

IEEE Intell. Syst., 2024

2023

Patch-Based Adversarial Training for Error-Aware Circuit Annotation of Delayered IC Images.

Yee-Yang Tee, Xuenong Hong, Deruo Cheng, Chye-Soon Chee, Yiqiong Shi, Tong Lin, Bah-Hwee Gwee

IEEE Trans. Circuits Syst. II Express Briefs, September, 2023

Deep-learning-based X-ray CT Slice Analysis for Layout Verification in Printed Circuit Boards.

Deruo Cheng, Yiqiong Shi, Yee-Yang Tee, Jingsi Song, Xue Wang, Bihan Wen, Bah-Hwee Gwee

Proceedings of the 5th IEEE International Conference on Artificial Intelligence Circuits and Systems, 2023

2022

Unsupervised Domain Adaptation with Histogram-gated Image Translation for Delayered IC Image Analysis.

Yee-Yang Tee, Deruo Cheng, Chye-Soon Chee, Tong Lin, Yiqiong Shi, Bah-Hwee Gwee

CoRR, 2022