Yiqiong Shi

Orcid: 0000-0002-9821-1783

According to our database1, Yiqiong Shi authored at least 18 papers between 2009 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2024
Integrated Circuit Mask-Generative Adversarial Network for Circuit Annotation With Targeted Data Augmentation.
IEEE Intell. Syst., 2024

2023
GraphClusNet: A Hierarchical Graph Neural Network for Recovered Circuit Netlist Partitioning.
IEEE Trans. Artif. Intell., October, 2023

Patch-Based Adversarial Training for Error-Aware Circuit Annotation of Delayered IC Images.
IEEE Trans. Circuits Syst. II Express Briefs, September, 2023

SEM2GDS: A Deep-Learning Based Framework To Detect Malicious Modifications In IC Layout.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

GRACER: Graph-Based Standard Cell Recognition in IC Images for Hardware Assurance.
Proceedings of the 49th Annual Conference of the IEEE Industrial Electronics Society, 2023

Deep-learning-based X-ray CT Slice Analysis for Layout Verification in Printed Circuit Boards.
Proceedings of the 5th IEEE International Conference on Artificial Intelligence Circuits and Systems, 2023

2022
Delayered IC image analysis with template-based Tanimoto Convolution and Morphological Decision.
IET Circuits Devices Syst., 2022

Unsupervised Domain Adaptation with Histogram-gated Image Translation for Delayered IC Image Analysis.
CoRR, 2022

2021
Joint Anomaly Detection and Inpainting for Microscopy Images Via Deep Self-Supervised Learning.
Proceedings of the 2021 IEEE International Conference on Image Processing, 2021

2019
A Hierarchical Multiclassifier System for Automated Analysis of Delayered IC Images.
IEEE Intell. Syst., 2019

Global Template Projection and Matching Method for Training-Free Analysis of Delayered IC Images.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

2018
Hybrid K-Means Clustering and Support Vector Machine Method for via and Metal Line Detections in Delayered IC Images.
IEEE Trans. Circuits Syst. II Express Briefs, 2018

Deep Learning for Automatic IC Image Analysis.
Proceedings of the 23rd IEEE International Conference on Digital Signal Processing, 2018

2013
Designing globally-asynchronous-locally-system from multi-rate Simulink model.
Proceedings of the IEEE 11th International New Circuits and Systems Conference, 2013

2012
Extracting functional modules from flattened gate-level netlist.
Proceedings of the International Symposium on Communications and Information Technologies, 2012

2011
Asynchronous DSP for low-power energy-efficient embedded systems.
Microprocess. Microsystems, 2011

2010
A highly efficient method for extracting FSMs from flattened gate-level netlist.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

2009
A Low-Voltage Micropower Asynchronous Multiplier With Shift-Add Multiplication Approach.
IEEE Trans. Circuits Syst. I Regul. Pap., 2009


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