Deruo Cheng

Orcid: 0000-0003-2497-9340

According to our database1, Deruo Cheng authored at least 10 papers between 2018 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

Online presence:

On csauthors.net:

Bibliography

2024
Integrated Circuit Mask-Generative Adversarial Network for Circuit Annotation With Targeted Data Augmentation.
IEEE Intell. Syst., 2024

2023
Patch-Based Adversarial Training for Error-Aware Circuit Annotation of Delayered IC Images.
IEEE Trans. Circuits Syst. II Express Briefs, September, 2023

Deep-learning-based X-ray CT Slice Analysis for Layout Verification in Printed Circuit Boards.
Proceedings of the 5th IEEE International Conference on Artificial Intelligence Circuits and Systems, 2023

2022
Delayered IC image analysis with template-based Tanimoto Convolution and Morphological Decision.
IET Circuits Devices Syst., 2022

Unsupervised Domain Adaptation with Histogram-gated Image Translation for Delayered IC Image Analysis.
CoRR, 2022

2021
Joint Anomaly Detection and Inpainting for Microscopy Images Via Deep Self-Supervised Learning.
Proceedings of the 2021 IEEE International Conference on Image Processing, 2021

2019
A Hierarchical Multiclassifier System for Automated Analysis of Delayered IC Images.
IEEE Intell. Syst., 2019

Global Template Projection and Matching Method for Training-Free Analysis of Delayered IC Images.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

2018
Hybrid K-Means Clustering and Support Vector Machine Method for via and Metal Line Detections in Delayered IC Images.
IEEE Trans. Circuits Syst. II Express Briefs, 2018

Deep Learning for Automatic IC Image Analysis.
Proceedings of the 23rd IEEE International Conference on Digital Signal Processing, 2018


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