Yen-Hsiang Chen

Orcid: 0000-0002-5316-7678

According to our database1, Yen-Hsiang Chen authored at least 15 papers between 2005 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2023
Incorporating bus delay minimization in design of signal progression for arterials accommodating heavy mixed-traffic flows.
J. Intell. Transp. Syst., March, 2023

Optimizing Arterial Traffic Signal Settings: Shotgun Version for Simultaneous Perturbation Stochastic Approximation Approach.
Proceedings of the Winter Simulation Conference, 2023

2012
Statistical skin color detection method without color transformation for real-time surveillance systems.
Eng. Appl. Artif. Intell., 2012

An Energy Efficient Binarization Algorithm Based on 2-D Intelligent Block Detection for Complex Texture and Gradient Color Images.
Proceedings of the 2012 Sixth International Conference on Genetic and Evolutionary Computing, 2012

Intelligent applications design in automotive infortainment systems.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2012

2011
FPGA implementation of high sampling rate in-car non-stationary noise cancellation based on adaptive Wiener filter.
Proceedings of the IEEE/IFIP 19th International Conference on VLSI and System-on-Chip, 2011

2010
Honeycomb model based skin colour detector for face detection.
Int. J. Comput. Appl. Technol., 2010

2008
Integrating Bi-Direction Audio and Video Transmission for UltraVNC.
Proceedings of the NCM 2008, The Fourth International Conference on Networked Computing and Advanced Information Management, Gyeongju, Korea, September 2-4, 2008, 2008

2006
Dynamic Tree Reconstruction with Application to Timing-Constrained Congestion-Driven Global Routing.
Proceedings of the 19th International Conference on VLSI Design (VLSI Design 2006), 2006

Optimal shielding insertion for inductive noise avoidance.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

Multilevel timing-constrained full-chip routing in hierarchical quad-grid model.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

2005
Timing-Constrained Flexibility-Driven Routing Tree Construction.
IEICE Trans. Inf. Syst., 2005

Wiring area optimization in floorplan-aware hierarchical power grids.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

Decoupling capacitance allocation in noise-aware floorplanning based on DBL representation.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

Probabilistic congestion prediction in hierarchical quad-grid model.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005


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