Yen-Hsin Wei

According to our database1, Yen-Hsin Wei authored at least 4 papers between 2014 and 2018.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2018
A 10-bit 2.6-GS/s Time-Interleaved SAR ADC With a Digital-Mixing Timing-Skew Calibration Technique.
IEEE J. Solid State Circuits, 2018

2016
A 200-MS/s Phase-Detector-Based Comparator With 400-μV<sub>rms</sub> Noise.
IEEE Trans. Circuits Syst. II Express Briefs, 2016

27.7 A 10b 2.6GS/s time-interleaved SAR ADC with background timing-skew calibration.
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016

2014
A 1-V-0.6-V 9-b 1.5-MS/s Reference-Free Charge-Sharing SAR ADC for Wireless-Powered Implantable Telemetry.
IEEE Trans. Circuits Syst. II Express Briefs, 2014


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