Yi Jin

Orcid: 0000-0003-4335-6691

Affiliations:
  • Fudan University, School of Information Science and Technology, State Key Laboratory of ASIC and System, Shanghai, China


According to our database1, Yi Jin authored at least 15 papers between 2017 and 2023.

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Bibliography

2023
Self-aware Collaborative Edge Inference with Embedded Devices for Task-oriented IIoT.
Proceedings of the 98th IEEE Vehicular Technology Conference, 2023

2022
Edge-Based Collaborative Training System for Artificial Intelligence-of-Things.
IEEE Trans. Ind. Informatics, 2022

Communication-efficient distributed AI strategies for the IoT edge.
Future Gener. Comput. Syst., 2022

2021
A Memory-Efficient CNN Accelerator Using Segmented Logarithmic Quantization and Multi-Cluster Architecture.
IEEE Trans. Circuits Syst. II Express Briefs, 2021

Self-aware distributed deep learning framework for heterogeneous IoT edge devices.
Future Gener. Comput. Syst., 2021

A Neuromorphic Processing System for Low-Power Wearable ECG Classification.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, BioCAS 2021, 2021

Graph-Based Spatio-Temporal Backpropagation for Training Spiking Neural Networks.
Proceedings of the 3rd IEEE International Conference on Artificial Intelligence Circuits and Systems, 2021

A Memristor Model with Concise Window Function for Spiking Brain-Inspired Computation.
Proceedings of the 3rd IEEE International Conference on Artificial Intelligence Circuits and Systems, 2021

2020
Base-Reconfigurable Segmented Logarithmic Quantization and Hardware Design for Deep Neural Networks.
J. Signal Process. Syst., 2020

2019
Energy-Aware Workload Allocation for Distributed Deep Neural Networks in Edge-Cloud Continuum.
Proceedings of the 32nd IEEE International System-on-Chip Conference, 2019

Edge and Fog Computing Enabled AI for IoT-An Overview.
Proceedings of the IEEE International Conference on Artificial Intelligence Circuits and Systems, 2019

2018
A Design of Autonomous Error-Tolerant Architectures for Massively Parallel Computing.
IEEE Trans. Very Large Scale Integr. Syst., 2018

TMR Group Coding Method for Optimized SEU and MBU Tolerant Memory Design.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

2017
Designing bio-inspired autonomous error-tolerant massively parallel computing architectures.
Proceedings of the 30th IEEE International System-on-Chip Conference, 2017

A Power management scheme for wirelessly-powered RFID tags with inkjet-printed display.
Proceedings of the IEEE International Conference on RFID Technology & Application, 2017


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