Yi Liu

  • Xidian University, School of Microelectronics, Xi'an, China (PhD 2010)

According to our database1, Yi Liu authored at least 22 papers between 2013 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.



In proceedings 
PhD thesis 


Online presence:

On csauthors.net:


Machine learning based prediction model for single event burnout hardening design of power MOSFETs.
Microelectron. J., September, 2023

A Machine Learning Mapping Algorithm for NoC Optimization.
Symmetry, February, 2023

Ultra-low latency spiking neural networks with spatio-temporal compression and synaptic convolutional block.
Neurocomputing, 2023

SLSSNN: High energy efficiency spike-train level spiking neural networks with spatio-temporal conversion.
CoRR, 2023

Optimization Strategy of Regular NoC Mapping Using Genetic-Based Hyper-Heuristic Algorithm.
Symmetry, 2022

Direct Training via Backpropagation for Ultra-Low-Latency Spiking Neural Networks with Multi-Threshold.
Symmetry, 2022

Comparison in radiation tolerance between FLR planar junction termination and positive bevel edge termination for power diodes.
Microelectron. J., 2022

A Q-Learning-Based Fault-Tolerant and Congestion-Aware Adaptive Routing Algorithm for Networks-on-Chip.
IEEE Embed. Syst. Lett., 2022

Ultra-low Latency Adaptive Local Binary Spiking Neural Network with Accuracy Loss Estimator.
CoRR, 2022

A 2.6 GΩ, 1.4 μV<sub>rms</sub> current-reuse instrumentation amplifier for wearable electrocardiogram monitoring.
Microelectron. J., 2021

Direct Training via Backpropagation for Ultra-low Latency Spiking Neural Networks with Multi-threshold.
CoRR, 2021

Machine Learning Regression based Single Event Transient Modeling Method for Circuit-Level Simulation.
CoRR, 2021

SRNoC: An Ultra-Fast Configurable FPGA-Based NoC Simulator Using Switch-Router Architecture.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

Low power and reliable interconnection with combination of Crosstalk Avoidance Green Coding and capacitively charge-sharing transmitter for network-on-chip.
Microelectron. J., 2018

Unified multi-objective mapping for network-on-chip using genetic-based hyper-heuristic algorithms.
IET Comput. Digit. Tech., 2018

An intelligent partitioning approach of the system-on-chip for flexible and stretchable systems.
Sci. China Inf. Sci., 2018

A Multi-Objective Architecture Optimization Method for Application-Specific Noc Design.
Proceedings of the 31st IEEE International System-on-Chip Conference, 2018

An efficient energy and thermal-aware mapping for regular network-on-chip.
IEICE Electron. Express, 2017

A Study of PN Junction Diffusion Capacitance of MOSFET in Presence of Single Event Transient.
J. Electron. Test., 2017

Green phase difference coding with low switching activity for Network-on-Chip.
IEICE Electron. Express, 2015

CCS: A low-power capacitively charge-sharing transmitter for NoC links.
IEICE Electron. Express, 2014

Two-dimensional electrical modeling of thermoelectric devices considering temperature-dependent parameters under the condition of nonuniform substrate temperature distribution.
Microelectron. J., 2013