Yong-Min Ju

According to our database1, Yong-Min Ju authored at least 7 papers between 2016 and 2018.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Other 

Links

On csauthors.net:

Bibliography

2018
A Hybrid Dual-Path Step-Down Converter with 96.2% Peak Efficiency Using a $250\text{m}$ μ Large-DCR Inductor.
Proceedings of the 2018 IEEE Symposium on VLSI Circuits, 2018

A Quasi-Digital Ultra-Fast Capacitor-Less Low-Dropout Regulator Based on Comparator Control for x8 Current Spike of PCRAM Systems.
Proceedings of the 2018 IEEE Symposium on VLSI Circuits, 2018

A 95.2% efficiency dual-path DC-DC step-up converter with continuous output current delivery and low voltage ripple.
Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018

A 13.56MHz time-interleaved resonant-voltage-mode wireless-power receiver with isolated resonator and quasi-resonant boost converter for implantable systems.
Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018

2017
5.2 An 8Ω 10W 91%-power-efficiency 0.0023%-THD+N multi-level Class-D audio amplifier with folded PWM.
Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017

10.4 A hybrid inductor-based flying-capacitor-assisted step-up/step-down DC-DC converter with 96.56% efficiency.
Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017

2016
A reconfigurable SIMO system with 10-output dual-bus DC-DC converter using the load balancing function in group allocator for diversified load condition.
Proceedings of the 2016 IEEE Symposium on VLSI Circuits, 2016


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