Yong-Sheng Yin
According to our database1,
Yong-Sheng Yin
authored at least 8 papers
between 2008 and 2016.
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Bibliography
2016
A Low Complexity All-Digital Background Calibration Technique for Time-Interleaved ADCs.
VLSI Design, 2016
An efficient digital calibration technique for timing mismatch in time-interleaved ADCs.
IEICE Electron. Express, 2016
2015
Proceedings of the 2015 IEEE 11th International Conference on ASIC, 2015
2008
A 14-bit 320 MSPS Segmented Current-Steering D/A Converter for High-Speed Applications.
Proceedings of the 4th IEEE International Symposium on Electronic Design, 2008
Proceedings of the International Conference on Computer Science and Software Engineering, 2008
A low power consumption, high speed Op-amp for a 10-bit 100MSPS parallel pipeline ADC.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2008
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2008
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2008