Fujiang Lin

Orcid: 0000-0003-3095-5679

According to our database1, Fujiang Lin authored at least 71 papers between 1998 and 2026.

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Bibliography

2026
Spectrum-based anomaly detection using channel state information and attention mechanisms for elderly health monitoring.
Eng. Appl. Artif. Intell., 2026

A Dual-Mode Dual-Band RTWO Covering X and K Bands with Phase Interpolation Based Phase Calibration Achieving 180.4 dBc/Hz FoM.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2026

2025
A 25-GHz PLL Achieving 8-ns Phase-Shifting Time With Double-Path Modulation Scheme.
IEEE Trans. Very Large Scale Integr. Syst., June, 2025

Robust Fault Detection in Phased Array Antennas via Deep Neural Networks.
Proceedings of the 13th International Conference on Information Technology: IoT and Smart City, 2025

A 0.0022 mm<sup>2</sup>, 2 GS/s Resettable VCO-Based ADC With-out Quantization Noise Shaping.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2025

2024
Electronic Skin as Human-Robot Interface for Human Grasp Recognition in Home-Care Robots: Introducing a Complete Set of Resources.
IEEE Robotics Autom. Mag., September, 2024

Three-Terminal GaN-Based p-n Diode: From Device to Integrated Photonic Applications.
Proceedings of the IEEE Region 10 Conference, 2024

A 25Gbps Single-Ended to Differential Low-Noise Transimpedance Amplifier in 45nm SOI for High-Speed Optical Transceivers.
Proceedings of the IEEE Region 10 Conference, 2024

Physics-Based GaN HEMT Device Modeling for MIMC.
Proceedings of the IEEE Region 10 Conference, 2024

A Wide Dynamic Range Burst Mode Transimpedance Amplifier in BiCMOS Technology.
Proceedings of the IEEE International Conference on Integrated Circuits, 2024

2023
A new idea in response to fast correlation attacks on small-state stream ciphers.
Microprocess. Microsystems, February, 2023

An 18.8-to-23.3 GHz ADPLL Based on Charge-Steering-Sampling Technique Achieving 75.9 fs RMS Jitter and -252 dB FoM.
Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023

2021
Optimum DCT type-I based transceiver model and effective channel estimation for uplink NB-IoT system.
Phys. Commun., 2021

An Architecture Design of Auto Channel Switching Unit for Hybrid Visible Light Communication System.
J. Commun., 2021

On Efficient DCT Type-I Based Low Complexity Channel Estimation for Uplink NB-IoT Systems.
IEEE Access, 2021

A 7-bit 1-GS/s Flash-SAR ADC with Time Interpolator in 45-nm SOI CMOS.
Proceedings of the 2021 IEEE International Conference on Integrated Circuits, 2021

Maximum Channel Temperature Estimation for GaN HEMT transistors with n-fingers.
Proceedings of the 2021 IEEE International Conference on Integrated Circuits, 2021

2020
A Low-Spur and Intrinsically Aligned IL-PLL With Self-Feedback Injection Locked RO and Pseudo-Random Injection Locked Technique.
IEEE Trans. Circuits Syst. I Fundam. Theory Appl., 2020

A Low Phase Noise, High Phase Accuracy Quadrature LC-VCO With Dual-Tail Current Biasing to Insert Reconfigurable Phase Delay.
IEEE Trans. Circuits Syst. II Express Briefs, 2020

A Single-Fed Multiband Antenna for WLAN and 5G Applications.
Sensors, 2020

A Bandwidth and Frequency Calibration Method for OOK UWB-IR Transmitter with High Energy Efficiency.
J. Circuits Syst. Comput., 2020

A new idea in response to fast correlation attacks on small-state stream ciphers.
IACR Cryptol. ePrint Arch., 2020

On improved DFT-based low-complexity channel estimation algorithms for LTE-based uplink NB-IoT systems.
Comput. Commun., 2020

An Efficient Polar Coding Scheme for Uplink Data Transmission in Narrowband Internet of Things Systems.
IEEE Access, 2020

CRC-Aided Belief Propagation Polar Decoding Scheme for NB-loT Systems.
Proceedings of the 2020 IEEE International Conference on Integrated Circuits, 2020

A Wideband LNA with Gm-Boosted and Noise Cancel Technique.
Proceedings of the 2020 IEEE International Conference on Integrated Circuits, 2020

A 224-Gb/s PAM4 High-Linearity, Energy-Efficiency Differential to Single-Ended Driver in 130-nm SiGe BiCMOS.
Proceedings of the 2020 IEEE International Conference on Integrated Circuits, 2020

An improved QPZD Ids, GV model for 0.1μm AlGaN/GaN HEMTs Process.
Proceedings of the 2020 IEEE International Conference on Integrated Circuits, 2020

2019
A Low-Noise Digital-to-Frequency Converter Based on Injection-Locked Ring Oscillator and Rotated Phase Selection for Fractional- $N$ Frequency Synthesis.
IEEE Trans. Very Large Scale Integr. Syst., 2019

Temperature Variation Effect on a Rectangular Microstrip Patch Antenna.
Int. J. Online Biomed. Eng., 2019

Analysis of phased array antenna system via spherical harmonics decomposition.
IET Commun., 2019

Frequency-domain channel equalisation for LTE-based uplink narrowband Internet of Things systems.
IET Commun., 2019

On designing secure small-state stream ciphers against time-memory-data tradeoff attacks.
IACR Cryptol. ePrint Arch., 2019

2018
Channel Estimation and Peak-to-Average Power Ratio Analysis of Narrowband Internet of Things Uplink Systems.
Wirel. Commun. Mob. Comput., 2018

A 1-Gb/s 6-10-GHz, Filterless, Pulsed UWB Transmitter With Symmetrical Waveform Analysis and Generation.
IEEE Trans. Very Large Scale Integr. Syst., 2018

A Joint Low-Power Cell Search and Frequency Tracking Scheme in NB-IoT Systems for Green Internet of Things.
Sensors, 2018

A 3 mW 1.2-3.6 GHz Multi-Phase PLL-Based Clock Generator with TDC Assisted Auto-Calibration of Loop Bandwidth.
J. Circuits Syst. Comput., 2018

Energy-Efficient Gain Cell and Its Applications in the Limiting Amplifier and Ring Oscillator for Gbps Communications.
J. Circuits Syst. Comput., 2018

Narrowband Internet of Things: Repetition-Based Coverage Performance Analysis of Uplink Systems.
J. Commun., 2018

2017
Wireless Interconnect in Multilayer Chip-Area-Networks for Future Multimaterial High-Speed Systems Design.
Wirel. Commun. Mob. Comput., 2017

A Time-Interleaved Statistically-Driven Two-Step Flash ADC for High-Speed Wireline Applications.
J. Circuits Syst. Comput., 2017

A 0.6V 19.5μW 80dB DR ΔΣ Modulator with SA-Quantizers and Digital Feedforward Path.
J. Circuits Syst. Comput., 2017

All-digital background calibration technique for timing mismatch of time-interleaved ADCs.
Integr., 2017

Dual 3-phase buck converter for multi-core CPUs power supply in mobile devices.
IEICE Electron. Express, 2017

A highly linear voltage-to-time converter with variable conversion gain for time-based ADCs.
Proceedings of the 12th IEEE International Conference on ASIC, 2017

A noise-shaping SAR ADC with dual error-feedback paths and alternate DACs.
Proceedings of the 12th IEEE International Conference on ASIC, 2017

A 1.0-7.0 GHz inductorless RF mixer with multiple feedback and active load in 40-nm CMOS.
Proceedings of the 12th IEEE International Conference on ASIC, 2017

A low-power digital GFSK receiver with mid-value filtering frequency offset estimator and soft anti-overlap slicer.
Proceedings of the 12th IEEE International Conference on ASIC, 2017

2016
A Low Complexity All-Digital Background Calibration Technique for Time-Interleaved ADCs.
VLSI Design, 2016

Floorplanning and Topology Synthesis for Application-Specific Network-on-Chips with RF-Interconnect.
ACM Trans. Design Autom. Electr. Syst., 2016

An Ultra-Low Power Subthreshold CMOS RSSI for Wake-Up Receiver.
J. Circuits Syst. Comput., 2016

Collection of charge in NMOS from single event effect.
IEICE Electron. Express, 2016

A tri-mode high light-load efficiency BUCK converter for mobile phone application.
IEICE Electron. Express, 2016

An efficient digital calibration technique for timing mismatch in time-interleaved ADCs.
IEICE Electron. Express, 2016

2015
Analysis of Current Efficiency for CMOS Class-B LC Oscillators.
IEEE Trans. Circuits Syst. I Regul. Pap., 2015

A Multibit Delta-Sigma Modulator With Double Noise-Shaped Segmentation.
IEEE Trans. Circuits Syst. II Express Briefs, 2015

A Speed-Enhancing Dual-Trial Instantaneous Switching Architecture for SAR ADCs.
IEEE Trans. Circuits Syst. II Express Briefs, 2015

Self-Dithering Technique for High-Resolution SAR ADC Design.
IEEE Trans. Circuits Syst. II Express Briefs, 2015

A resistive-feedback LNA in 65 nm CMOS with a gate inductor for bandwidth extension.
Microelectron. J., 2015

390-640MHz tunable oscillator based on phase interpolation with -120dBc/Hz in-band noise.
Proceedings of the 2015 IEEE Custom Integrated Circuits Conference, 2015

A Low-Power VCO based ADC with asynchronous sigma-delta modulator in 65nm CMOS.
Proceedings of the 20th Asia and South Pacific Design Automation Conference, 2015

2014
Digital Noise-Coupling Technique for Delta-Sigma Modulators With Segmented Quantization.
IEEE Trans. Circuits Syst. II Express Briefs, 2014

Noncontact Accurate Measurement of Cardiopulmonary Activity Using a Compact Quadrature Doppler Radar Sensor.
IEEE Trans. Biomed. Eng., 2014

A 7.8 mW 5.2% FSK error Two-Point modulator without Calibration.
J. Circuits Syst. Comput., 2014

2011
A 60-GHz 1-V Supply Band-Tunable Power Amplifier in 65-nm CMOS.
IEEE Trans. Circuits Syst. II Express Briefs, 2011

2010
Design of Ka-Band Colpitts Oscillators Using a Parasitic Cancellation Technique.
IEEE Trans. Circuits Syst. I Regul. Pap., 2010

A 60-GHz OOK Receiver With an On-Chip Antenna in 90 nm CMOS.
IEEE J. Solid State Circuits, 2010

2007
A 0.18μm CMOS Dual-Band UWB Transceiver.
Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007

2006
A CMOS Carrier-less UWB Transceiver for WPAN Applications.
Proceedings of the 2006 IEEE International Solid State Circuits Conference, 2006

2005
A gigahertz wideband CMOS multiplier for UWB transceiver.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

1998
A GaAs upconverter MMIC with an automatic gain control amplifier for 1.9 GHz PHS.
IEEE J. Solid State Circuits, 1998


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