Youngmin Hur

According to our database, Youngmin Hur authored at least 6 papers between 1995 and 1997.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

1997

Concurrent Fault and Design Error Simulation in Interactive Simulation Automation System.

Youngmin Hur, Saghir A. Shaikh, Silvian Goldenberg, D. Kacprzak, Stephen A. Szygenda

Proceedings of the Proceedings 30st Annual Simulation Symposium (SS '97), April 7-9, 1997, 1997

1996

A Hardware Accelerator for Fault Simulation Utilizing a Reconfigurable Array Architecture.

Sungho Kang, Youngmin Hur, Stephen A. Szygenda

VLSI Design, 1996

A Graphical Simulation and Automatic Model Generation System.

Youngmin Hur, Stephen A. Szygenda

Proceedings of the Modelling and Simulation, 1996

A Simulation Tool for Design Error Models Utilizing Error Compression and Sampling.

Youngmin Hur, Stephen A. Szygenda

Proceedings of the Proceedings 29st Annual Simulation Symposium (SS '96), 1996

1995

Massively Parallel Array Processor for Logic, Fault, and Design Error Simulation.

Youngmin Hur, Stephen A. Szygenda, E. Scott Fehr, Granville E. Ott, Sungho Kang

Proceedings of the 1st IEEE Symposium on High-Performance Computer Architecture (HPCA 1995), 1995

Special purpose array processor for digital logic simulation.

Youngmin Hur, Stephen A. Szygenda

Proceedings of the Proceedings 28st Annual Simulation Symposium (SS '95), 1995