Yu-Chih Tsai

Orcid: 0000-0002-5142-081X

According to our database1, Yu-Chih Tsai authored at least 6 papers between 2019 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

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Links

On csauthors.net:

Bibliography

2023
LV: Latency-Versatile Floating-Point Engine for High-Performance Deep Neural Networks.
IEEE Comput. Archit. Lett., 2023

Exploiting and Enhancing Computation Latency Variability for High-Performance Time-Domain Computing-in-Memory Neural Network Accelerators.
Proceedings of the 41st IEEE International Conference on Computer Design, 2023

CNN Inference Accelerators with Adjustable Feature Map Compression Ratios.
Proceedings of the 41st IEEE International Conference on Computer Design, 2023

Built-in Self-Test and Built-in Self-Repair Strategies Without Golden Signature for Computing in Memory.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023

2022
ISSA: Input-Skippable, Set-Associative Computing-in-Memory (SA-CIM) Architecture for Neural Network Accelerators.
Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design, 2022

2019
A Heart Rate Monitoring and Activities Recognition System for Badminton Training.
Proceedings of the 2019 International Symposium on Intelligent Signal Processing and Communication Systems, 2019


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