Yu-Kuan Hsiao

According to our database, Yu-Kuan Hsiao authored at least 4 papers between 2020 and 2022.

Collaborative distances:

• Dijkstra number of six.
• Erdős number of five.

2022

Extensible and Modularized Processing Unit Design and Implementation for AI Accelerator.

Chung-Bin Wu, Yu-Kuan Hsiao, Wei-Hsuan Chang

Proceedings of the 4th IEEE International Conference on Artificial Intelligence Circuits and Systems, 2022

2020

High Efficient Bandwidth Utilization Hardware Design and Implement for AI Deep Learning Accelerator.

Chung-Bin Wu, Yin-Tsung Hwang, Yu-Cheng Hsueh, Yu-Kuan Hsiao

Proceedings of the International SoC Design Conference, 2020

Cordic Based Hardware Implementation for Object Region Layer of Yolo V2.

Chung-Bin Wu, Yu-Kuan Hsiao

Proceedings of the IEEE International Conference on Consumer Electronics - Taiwan, 2020

Reconfigurable Hardware Architecture Design and Implementation for AI Deep Learning Accelerator.

Chung-Bin Wu, Ching-Shun Wang, Yu-Kuan Hsiao

Proceedings of the 9th IEEE Global Conference on Consumer Electronics, 2020