Yuan-Ping Huang
According to our database1,
Yuan-Ping Huang authored at least 2 papers
between 2024 and 2026.
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Bibliography
2026
A 66.15 TFLOPS/W RRAM-based Near-memory-computing Macro using Log-multiplication and Error-aware Adaptive Adder Structure with 2-D Pipelined CNN Dataflow.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2026
2024
A Multi-Bit Near-RRAM based Computing Macro with Highly Computing Parallelism for CNN Application.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2024