Yuancong Wu

According to our database, Yuancong Wu authored at least 7 papers between 2018 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

Design and Implementation of a Hybrid, ADC/DAC-Free, Input-Sparsity-Aware, Precision Reconfigurable RRAM Processing-in-Memory Chip.

Junjie Wang, Teng Zhang, Shuang Liu, Yihe Liu, Yuancong Wu, Shaogang Hu, Tupei Chen, Yang Liu, Yuchao Yang, Ru Huang

IEEE J. Solid State Circuits, February, 2024

2021

Design of a constant loop bandwidth phase-locked loop based on artificial neural network.

Rui Guo, Yuancong Wu, Shaogang Hu, Qi Yu, Tupei Chen, Yang Liu

IEICE Electron. Express, 2021

2020

Application of Deep Compression Technique in Spiking Neural Network Chip.

Yanchen Liu, Kun Qian, Shaogang Hu, Kun An, Sheng Xu, Xitong Zhan, Junjie Wang, Rui Guo, Yuancong Wu, Tupei Chen, Qi Yu, Yang Liu

IEEE Trans. Biomed. Circuits Syst., 2020

An energy-efficient deep convolutional neural networks coprocessor for multi-object detection.

Yuancong Wu, Junjie Wang, Kun Qian, Yanchen Liu, Rui Guo, Shaogang Hu, Qi Yu, Tupei Chen, Yang Liu, Limei Rong

Microelectron. J., 2020

2019

Implementation of a Low Noise Amplifier With Self-Recovery Capability.

Yanchen Liu, Caizhi Zhang, Tupei Chen, Deyu Kong, Rui Guo, Junjie Wang, Yuancong Wu, Shaogang Hu, L. M. Rong, Qi Yu, Yang Liu

IEEE Access, 2019

Design of a Neural Network-Based VCO With High Linearity and Wide Tuning Range.

Rui Guo, Kun Qian, Jinping Wei, Tupei Chen, Yanchen Liu, Deyu Kong, Junjie Wang, Yuancong Wu, Shaogang Hu, Qi Yu, Yang Liu

IEEE Access, 2019

2018

Realization of a Power-Efficient Transmitter Based on Integrated Artificial Neural Network.

Deyu Kong, Shaogang Hu, Yuancong Wu, Junjie Wang, Canlong Xiong, Qi Yu, Zhengyu Shi, Zhen Liu, Tupei Chen, You Yin, Sumio Hosaka, Yang Liu

IEEE Access, 2018