Shaogang Hu

According to our database, Shaogang Hu authored at least 23 papers between 2013 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

Fullerene-Inspired Efficient Neuromorphic Network-on-Chip Scheme.

Pujun Zhou, Qi Yu, M. Chen, Guanchao Qiao, Yue Zuo, Zhong Zhang, Yang Liu, Shaogang Hu

IEEE Trans. Circuits Syst. II Express Briefs, March, 2024

Design and Implementation of a Hybrid, ADC/DAC-Free, Input-Sparsity-Aware, Precision Reconfigurable RRAM Processing-in-Memory Chip.

Junjie Wang, Teng Zhang, Shuang Liu, Yihe Liu, Yuancong Wu, Shaogang Hu, Tupei Chen, Yang Liu, Yuchao Yang, Ru Huang

IEEE J. Solid State Circuits, February, 2024

A&B BNN: Add&Bit-Operation-Only Hardware-Friendly Binary Neural Network.

Ruichen Ma, Guanchao Qiao, Yian Liu, Liwei Meng, Ning Ning, Yang Liu, Shaogang Hu

CoRR, 2024

2023

Achieving High Core Neuron Density in a Neuromorphic Chip Through Trade-off Among Area, Power Consumption, and Data Access Bandwidth.

Pujun Zhou, Yue Zuo, Guanchao Qiao, C. M. Zhang, Zhong Zhang, Liwei Meng, Qi Yu, Yang Liu, Shaogang Hu

IEEE Trans. Biomed. Circuits Syst., December, 2023

An efficient pruning and fine-tuning method for deep spiking neural network.

Liwei Meng, Guanchao Qiao, X. Y. Zhang, J. Bai, Yue Zuo, Pujun Zhou, Yang Liu, Shaogang Hu

Appl. Intell., December, 2023

Batch normalization-free weight-binarized SNN based on hardware-saving IF neuron.

Guanchao Qiao, Nanning Zheng, Yue Zuo, P. J. Zhou, M. L. Sun, Shaogang Hu, Qi Yu, Y. Liu

Neurocomputing, August, 2023

Ultra-High-Speed Accelerator Architecture for Convolutional Neural Network Based on Processing-in-Memory Using Resistive Random Access Memory.

Hongzhe Wang, Junjie Wang, Hao Hu, Guo Li, Shaogang Hu, Qi Yu, Zhen Liu, Tupei Chen, Shijie Zhou, Yang Liu

Sensors, March, 2023

An Area- and Energy-Efficient Spiking Neural Network With Spike-Time-Dependent Plasticity Realized With SRAM Processing-in-Memory Macro and On-Chip Unsupervised Learning.

Shuang Liu, Junjie Wang, Jingtao Zhou, Shaogang Hu, Qi Yu, Tupei Chen, Yang Liu

IEEE Trans. Biomed. Circuits Syst., February, 2023

ResNet-TCN: A Joint Model for ECG Heartbeat Classification with High Accuracy.

Shaogang Hu, Renwei Li, Qiang Hu, Guanchao Qiao

Proceedings of the International Conference on Information Networking, 2023

2022

A Co-Designed Neuromorphic Chip With Compact (17.9K F²) and Weak Neuron Number-Dependent Neuron/Synapse Modules.

Shaogang Hu, Guanchao Qiao, X. K. Liu, Y. H. Liu, C. M. Zhang, Yue Zuo, Pujun Zhou, Yian Liu, Ning Ning, Qi Yu, Yang Liu

IEEE Trans. Biomed. Circuits Syst., December, 2022

2021

Quantized STDP-based online-learning spiking neural network.

Shaogang Hu, Guanchao Qiao, Tupei Chen, Qi Yu, Y. Liu, L. M. Rong

Neural Comput. Appl., 2021

Direct training of hardware-friendly weight binarized spiking neural network with surrogate gradient learning towards spatio-temporal event-based dynamic data recognition.

Guanchao Qiao, Ning Ning, Yue Zuo, Shaogang Hu, Qi Yu, Y. Liu

Neurocomputing, 2021

Design of a constant loop bandwidth phase-locked loop based on artificial neural network.

Rui Guo, Yuancong Wu, Shaogang Hu, Qi Yu, Tupei Chen, Yang Liu

IEICE Electron. Express, 2021

2020

Application of Deep Compression Technique in Spiking Neural Network Chip.

Yanchen Liu, Kun Qian, Shaogang Hu, Kun An, Sheng Xu, Xitong Zhan, Junjie Wang, Rui Guo, Yuancong Wu, Tupei Chen, Qi Yu, Yang Liu

IEEE Trans. Biomed. Circuits Syst., 2020

An energy-efficient deep convolutional neural networks coprocessor for multi-object detection.

Yuancong Wu, Junjie Wang, Kun Qian, Yanchen Liu, Rui Guo, Shaogang Hu, Qi Yu, Tupei Chen, Yang Liu, Limei Rong

Microelectron. J., 2020

STBNN: Hardware-friendly spatio-temporal binary neural network with high pattern recognition accuracy.

Guanchao Qiao, Shaogang Hu, Tupei Chen, L. M. Rong, Ning Ning, Qi Yu, Y. Liu

Neurocomputing, 2020

2019

A Neuromorphic-Hardware Oriented Bio-Plausible Online-Learning Spiking Neural Network Model.

Chunming Qiao, Shaogang Hu, Junjie Wang, C. M. Zhang, Tupei Chen, Ning Ning, Qi Yu, Yang Liu

IEEE Access, 2019

Implementation of a Low Noise Amplifier With Self-Recovery Capability.

Yanchen Liu, Caizhi Zhang, Tupei Chen, Deyu Kong, Rui Guo, Junjie Wang, Yuancong Wu, Shaogang Hu, L. M. Rong, Qi Yu, Yang Liu

IEEE Access, 2019

Study of Recall Time of Associative Memory in a Memristive Hopfield Neural Network.

Deyu Kong, Shaogang Hu, Junjie Wang, Zhen Liu, Tupei Chen, Qi Yu, Yang Liu

IEEE Access, 2019

Design of a Neural Network-Based VCO With High Linearity and Wide Tuning Range.

Rui Guo, Kun Qian, Jinping Wei, Tupei Chen, Yanchen Liu, Deyu Kong, Junjie Wang, Yuancong Wu, Shaogang Hu, Qi Yu, Yang Liu

IEEE Access, 2019

2018

Predicting House Price With a Memristor-Based Artificial Neural Network.

Junjie Wang, Shaogang Hu, X. T. Zhan, Q. Luo, Qi Yu, Zhen Liu, Tupei Chen, Y. Yin, Sumio Hosaka, Yang Liu

IEEE Access, 2018

Realization of a Power-Efficient Transmitter Based on Integrated Artificial Neural Network.

Deyu Kong, Shaogang Hu, Yuancong Wu, Junjie Wang, Canlong Xiong, Qi Yu, Zhengyu Shi, Zhen Liu, Tupei Chen, You Yin, Sumio Hosaka, Yang Liu

IEEE Access, 2018

2013

Vco-Based continuous-Time Sigma Delta ADC Based on a Dual-VCO-quantizer-Loop Structure.

Zhentao Xu, X. L. Zhang, J. Z. Chen, Shaogang Hu, Qi Yu, Yang Liu, Wei Meng Lim

J. Circuits Syst. Comput., 2013