Yukiko Kubo

According to our database1, Yukiko Kubo authored at least 10 papers between 2000 and 2006.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2006
Global Routing by Iterative Improvements for Two-Layer Ball Grid Array Packages.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006

2005
Equidistance routing in high-speed VLSI layout design.
Integr., 2005

A Via Assignment and Global Routing Method for 2-Layer Ball Grid Array Packages.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2005

A global routing method for 2-layer ball grid array packages.
Proceedings of the 2005 International Symposium on Physical Design, 2005

2003
An Incremental Wiring Algorithm for VLSI Layout Design.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2003

2002
Consistent floorplanning with hierarchical superconstraints.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2002

Explicit Expression and Simultaneous Optimization of Placement and Routing for Analog IC Layouts.
Proceedings of the 7th Asia and South Pacific Design Automation Conference (ASP-DAC 2002), 2002

Chip size estimation based on wiring area.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2002, 2002

2001
Consistent floorplanning with super hierarchical constraints.
Proceedings of the 2001 International Symposium on Physical Design, 2001

2000
Self-reforming routing for stochastic search in VLSI interconnection layout.
Proceedings of ASP-DAC 2000, 2000


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