Yun-Che Chang

According to our database, Yun-Che Chang authored at least 3 papers between 2024 and 2025.

Collaborative distances:

• Dijkstra number of six.
• Erdős number of five.

2025

A 24.9% Power Reduction Active Gate Driver With Power Gating and Current Modulation for Power MOSFETs.

Chua-Chin Wang, Pradyumna Vellanki, Wei-En Chiu, L. S. S. Pavan Kumar Chodisetti, Venkata Naveen Kolakaluri, Yun-Che Chang, Mitch Ming-Chi Chou

IEEE Trans. Circuits Syst. II Express Briefs, November, 2025

2024

A 10-MHz 5-V On-chip 6-layer Multi-level Digital Transformer Using T18HVG2 Process.

Oliver Lexter July A. Jose, Yun-Che Chang, Venkata Naveen Kolakaluri, Celso B. Co, Mitch Ming-Chi Chou, Chua-Chin Wang

Proceedings of the IEEE International Symposium on Circuits and Systems, 2024

Active Gate Driver Design Using Differential Timing-based Miller Detector for Power MOSFET.

Pradyumna Vellanki, Venkata Naveen Kolakaluri, Yun-Che Chang, L. S. S. Pavan Kumar Chodisetti, Mitch Ming-Chi Chou, Chua-Chin Wang

Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2024