Zahid Ullah

Orcid: 0000-0002-5633-6764

Affiliations:
  • Pak-Austria Fachhochschule, Institute of Applied Sciences and Technology, Department of Electrical and Computer Engineering, Haripur, Pakistan
  • CECOS University of IT & Emerging Sciences, Department of Electrical Engineering, Peshawar, Pakistan
  • City University of Hong Kong, Department of Electronic Engineering, Hong Kong


According to our database1, Zahid Ullah authored at least 25 papers between 2012 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Bibliography

2023
On Enhancing the Performance of IEEE 802.11ah by Employing a Dynamic Raw Approach in IoT Networks.
Wirel. Pers. Commun., April, 2023

2022
Reconfigurable content-addressable memory (CAM) on FPGAs: A tutorial and survey.
Future Gener. Comput. Syst., 2022

Comp-TCAM: An Adaptable Composite Ternary Content-Addressable Memory on FPGAs.
IEEE Embed. Syst. Lett., 2022

2021
PackeX: Low-Power High-Performance Packet Classifier Using Memory on FPGAs.
Wirel. Commun. Mob. Comput., 2021

Accelerated Updating Mechanisms for FPGA-Based Ternary Content-Addressable Memory.
IEEE Embed. Syst. Lett., 2021

An FPGA-Based Accelerated Mutation Detection System for the Tumor Suppressor Gene.
IEEE Access, 2021

Fast Codebook Generation Using Pattern Based Masking Algorithm for Image Compression.
IEEE Access, 2021

2020
RPE-TCAM: Reconfigurable Power-Efficient Ternary Content-Addressable Memory on FPGAs.
IEEE Trans. Very Large Scale Integr. Syst., 2020

High Speed Partial Pattern Classification System Using a CAM-Based LBP Histogram on FPGA.
IEEE Embed. Syst. Lett., 2020

2019
DURE: An Energy- and Resource-Efficient TCAM Architecture for FPGAs With Dynamic Updates.
IEEE Trans. Very Large Scale Integr. Syst., 2019

Beyond the Limits of Typical Strategies: Resources Efficient FPGA-Based TCAM.
IEEE Embed. Syst. Lett., 2019

D-TCAM: A High-Performance Distributed RAM Based TCAM Architecture on FPGAs.
IEEE Access, 2019

High Performance Power-Efficient Gate-Based CAM for Reconfigurable Computing.
Proceedings of the 15th International Conference on Mobile Ad-Hoc and Sensor Networks, 2019

Design Exploration of LH-CAM with Updating Mechanism.
Proceedings of International Joint Conference on Computational Intelligence, 2019

Low Power Pre-comparison Configuration Strategy for a Logic-based Binary CAM on FPGA.
Proceedings of the Second International Conference on Latest trends in Electrical Engineering and Computing Technologies, 2019

Bank-selective Strategy for Gate-based Ternary Content-addressable Memory on FPGAs.
Proceedings of the 30th IEEE International Conference on Application-specific Systems, 2019

2018
A Three-Dimensional Geometrical Scattering Model for Cellular Communication Environment.
Wirel. Pers. Commun., 2018

Fast Content Updating Algorithm for an SRAM-Based TCAM on FPGA.
IEEE Embed. Syst. Lett., 2018

Fast Pattern Recognition Through an LBP Driven CAM on FPGA.
IEEE Access, 2018

2017
LH-CAM: Logic-Based Higher Performance Binary CAM Architecture on FPGA.
IEEE Embed. Syst. Lett., 2017

G-AETCAM: Gate-Based Area-Efficient Ternary Content-Addressable Memory on FPGA.
IEEE Access, 2017

2015
Z-TCAM: An SRAM-based Architecture for TCAM.
IEEE Trans. Very Large Scale Integr. Syst., 2015

2014
E-TCAM: An Efficient SRAM-Based Architecture for TCAM.
Circuits Syst. Signal Process., 2014

2013
Design space explorations of Hybrid-Partitioned TCAM (HP-TCAM).
Proceedings of the 23rd International Conference on Field programmable Logic and Applications, 2013

2012
FPGA Implementation of SRAM-based Ternary Content Addressable Memory.
Proceedings of the 26th IEEE International Parallel and Distributed Processing Symposium Workshops & PhD Forum, 2012


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