Zahin Ibnat
Orcid: 0000-0001-5664-4428
According to our database1,
Zahin Ibnat authored at least 8 papers
between 2022 and 2026.
Collaborative distances:
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Bibliography
2026
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., May, 2026
2025
DeepV: A Model-Agnostic Retrieval-Augmented Framework for Verilog Code Generation with a High-Quality Knowledge Base.
CoRR, October, 2025
VerilogDB: The Largest, Highest-Quality Dataset with a Preprocessing Framework for LLM-based RTL Generation.
CoRR, July, 2025
Proceedings of the 7th ACM/IEEE Symposium on Machine Learning for CAD, 2025
2023
Proceedings of the 66th IEEE International Midwest Symposium on Circuits and Systems, 2023
Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2023
ActiWate: Adaptive and Design-agnostic Active Watermarking for IP Ownership in Modern SoCs.
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023
2022
Secure by construction: addressing security vulnerabilities introduced during high-level synthesis: invited.
Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022