Zaid Al-Wardi

According to our database, Zaid Al-Wardi authored at least 5 papers between 2015 and 2018.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2018

Synthesis of Reversible Circuits Using Conventional Hardware Description Languages.

Zaid Al-Wardi, Robert Wille, Rolf Drechsler

Proceedings of the 48th IEEE International Symposium on Multiple-Valued Logic, 2018

2017

Towards VHDL-Based Design of Reversible Circuits - Work in Progress Report.

Zaid Al-Wardi, Robert Wille, Rolf Drechsler

Proceedings of the Reversible Computation - 9th International Conference, 2017

Extensions to the Reversible Hardware Description Language SyReC.

Zaid Al-Wardi, Robert Wille, Rolf Drechsler

Proceedings of the 47th IEEE International Symposium on Multiple-Valued Logic, 2017

2016

Re-Writing HDL Descriptions for Line-Aware Synthesis of Reversible Circuits.

Zaid Al-Wardi, Robert Wille, Rolf Drechsler

Proceedings of the 46th IEEE International Symposium on Multiple-Valued Logic, 2016

2015

Towards Line-Aware Realizations of Expressions for HDL-Based Synthesis of Reversible Circuits.

Zaid Al-Wardi, Robert Wille, Rolf Drechsler

Proceedings of the Reversible Computation - 7th International Conference, 2015