Zain Ul Abideen

Orcid: 0000-0002-8865-9402

Affiliations:
  • Tallinn University of Technology, TalTech, Centre for Hardware Security, Department of Computer Systems, Estonia


According to our database1, Zain Ul Abideen authored at least 11 papers between 2020 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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Bibliography

2023
A Security-Aware and LUT-Based CAD Flow for the Physical Synthesis of hASICs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., October, 2023

A Versatile and Flexible Multiplier Generator for Large Integer Polynomials.
J. Hardw. Syst. Secur., September, 2023

Impact of Orientation on the Bias of SRAM-Based PUFs.
CoRR, 2023

An Overview of FPGA-inspired Obfuscation Techniques.
CoRR, 2023

2022
A Security-aware and LUT-based CAD Flow for the Physical Synthesis of eASICs.
CoRR, 2022

Preventing Distillation-based Attacks on Neural Network IP.
CoRR, 2022

Obfuscating the Hierarchy of a Digital IP.
Proceedings of the Embedded Computer Systems: Architectures, Modeling, and Simulation, 2022

2021
An Open-source Library of Large Integer Polynomial Multipliers.
Proceedings of the 24th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2021

From FPGAs to Obfuscated eASICs: Design and Security Trade-offs.
Proceedings of the Asian Hardware Oriented Security and Trust Symposium, 2021

2020
A Systematic Study of Lattice-based NIST PQC Algorithms: from Reference Implementations to Hardware Accelerators.
CoRR, 2020

EFIC-ME: A Fast Emulation Based Fault Injection Control and Monitoring Enhancement.
IEEE Access, 2020


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