Zhanhao Wen

According to our database, Zhanhao Wen authored at least 3 papers in 2025.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2025

A 112-Gb/s PAM-4 Retimer Transceiver With Jitter-Filtering Clocking Scheme and BER Optimization Technique in 28-nm CMOS.

Hua Xu, Mingche Lai, Xuqiang Zheng, Zedong Wang, Jiang Xu, Sai Li, Fangxu Lv, Min Liu, Weijie Li, Zhanhao Wen, Xuan Guo, Xinhua Wang, Zhi Jin, Xinyu Liu

IEEE J. Solid State Circuits, July, 2025

A dual-channel half-rate 32 Gb/s, 5.3 pJ/bit SerDes transceiver with 3-tap-FFE and CTLE in 28-nm CMOS for very short reach C2C and C2M interconnection.

Zhaoyang Liu, Zhanhao Wen, Bao Chen, Jiang Xu, Zedong Wang, Xuqiang Zheng

Microelectron. J., 2025

A 25 Gb/s 5.99 pJ/bit SerDes receiver with CTLE and quarter-rate adaptive loop-unrolling 5-tap DFE in 28-nm CMOS technology for wireline medium-reach interconnection.

Zhaoyang Liu, Bao Chen, Zhanhao Wen, Xuqiang Zheng, Zedong Wang, Jiang Xu, Wenxiang Zhen

IEICE Electron. Express, 2025