Zhe Liu

Orcid: 0000-0002-2008-8623

Affiliations:
  • Nanyang Technological University, School of Electrical and Electronics Engineering, Singapore


According to our database1, Zhe Liu authored at least 14 papers between 2017 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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Bibliography

2024
A 0.6 V, 1.74 mW, 2.9 dB NF Inductorless Wideband LNA in 28-nm CMOS Exploiting Noise Cancellation and Current Reuse.
IEEE Trans. Circuits Syst. I Regul. Pap., August, 2024

2023
A 2.4dB NF +4.1dBm IIP3 Differential Dual-Feedforward-Based Noise-Cancelling LNTA With Complementary NMOS and PMOS Configuration.
Proceedings of the 49th IEEE European Solid State Circuits Conference, 2023

2022
A 0.092-mm<sup>2</sup> 2-12-GHz Noise-Cancelling Low-Noise Amplifier With Gain Improvement and Noise Reduction.
IEEE Trans. Circuits Syst. II Express Briefs, 2022

A Hybrid Coupler-First 5GHz Noise-Cancelling Dual-Mode Receiver with +10dBm in-Band IIP3 in Current-Mode and 1.7dB NF in Voltage-Mode.
Proceedings of the IEEE International Solid-State Circuits Conference, 2022

A 0.0078mm2 3.4mW Wideband Positive-feedback-Based Noise-Cancelling LNA in 28nm CMOS Exploiting G<sub>m</sub> Boosting.
Proceedings of the IEEE International Solid-State Circuits Conference, 2022

A 2-GHz Dual-Path Sub-Sampling PLL with Ring VCO Phase Noise Suppression.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2022

2021
A Bidirectional Nonlinearly Coupled QVCO With Passive Phase Interpolation for Multiphase Signals Generation.
IEEE Trans. Very Large Scale Integr. Syst., 2021

A 1.75dB-NF 25mW 5GHz Transformer-Based Noise- Cancelling CMOS Receiver Front-End.
Proceedings of the IEEE International Solid-State Circuits Conference, 2021

2020
Design of a Wideband Variable-Gain Amplifier With Self-Compensated Transistor for Accurate dB-Linear Characteristic in 65 nm CMOS Technology.
IEEE Trans. Circuits Syst., 2020

Multi-Channel FSK Inter/Intra-Chip Communication by Exploiting Field-Confined Slow-Wave Transmission Line.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

2018
A 253mW/channel 4TX/4RX pulsed chirping phased-array radar TRX in 65nm CMOS for X-band synthetic-aperture radar imaging.
Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018

A DDS-Driven ADPLL Chirp Synthesizer with Ramp-Interpolating Linearization for FMCW Radar Application in 65nm CMOS.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

A DLL-based Configurable Multi-Phase Clock Generator for True-Time-Delay Wideband FMCW Phased-Array in 40nm CMOS.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

2017
The Investigation and Optimisation of Phase-Induced Amplitude Attenuation in the Injection-Locked Ring Oscillators-Based Receiver.
Circuits Syst. Signal Process., 2017


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