Chirn Chye Boon

According to our database1, Chirn Chye Boon authored at least 45 papers between 2004 and 2020.

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Bibliography

2020
An Inverted Ring Oscillator Noise-Shaping Time-to-Digital Converter With In-Band Noise Reduction and Coherent Noise Cancellation.
IEEE Trans. Circuits Syst. I Regul. Pap., 2020

Design of a Wideband Variable-Gain Amplifier With Self-Compensated Transistor for Accurate dB-Linear Characteristic in 65 nm CMOS Technology.
IEEE Trans. Circuits Syst., 2020

Compact Switched-Capacitor Power Detector With Frequency Compensation in 65-nm CMOS.
IEEE Access, 2020

A 0.024-mm<sup>2</sup> 45.4-GHz-Bandwidth Unity-Gain Output Driver with SDD22<-10dB up to 35 GHz.
Proceedings of the 63rd IEEE International Midwest Symposium on Circuits and Systems, 2020

2019
Design and Analysis of $D$ -Band On-Chip Modulator and Signal Source Based on Split-Ring Resonator.
IEEE Trans. Very Large Scale Integr. Syst., 2019

Editorial TVLSI Positioning - Continuing and Accelerating an Upward Trajectory.
IEEE Trans. Very Large Scale Integr. Syst., 2019

A 0.044-mm<sup>2</sup> 0.5-to-7-GHz Resistor-Plus-Source-Follower-Feedback Noise-Cancelling LNA Achieving a Flat NF of 3.3±0.45 dB.
IEEE Trans. Circuits Syst. II Express Briefs, 2019

A Low-Noise, Positive-Input, Negative-Output Voltage Generator for Low-to-Moderate Driving Capacity Applications.
IEEE Trans. Circuits Syst. I Regul. Pap., 2019

A 0.0071-mm<sup>2</sup> 10.8ps<sub>pp</sub>-Jitter 4 to 10-Gb/s 5-Tap Current-Mode Transmitter Using a Hybrid Delay Line for Sub-1-UI Fractional De-Emphasis.
IEEE Trans. Circuits Syst. I Regul. Pap., 2019

A 24/77 GHz Dual-Band Receiver for Automotive Radar Applications.
IEEE Access, 2019

Wideband Variable-Gain Amplifiers Based on a Pseudo-Current-Steering Gain-Tuning Technique.
Proceedings of the 2019 IEEE Asia Pacific Conference on Circuits and Systems, 2019

A 32-Gb/s 3.53-mW/Gb/s Adaptive Receiver AFE Employing a Hybrid CTLE, Edge-DFE and Merged Data-DFE/CDR in 65-nm CMOS.
Proceedings of the 2019 IEEE Asia Pacific Conference on Circuits and Systems, 2019

2018
A 0.013-mm<sup>2</sup> 0.53-mW/Gb/s 32-Gb/s Hybrid Analog Equalizer Under 21-dB Channel Loss in 65-nm CMOS.
IEEE Trans. Very Large Scale Integr. Syst., 2018

A Wideband Inductorless dB-Linear Automatic Gain Control Amplifier Using a Single-Branch Negative Exponential Generator for Wireline Applications.
IEEE Trans. Circuits Syst. I Regul. Pap., 2018

A 36-Gb/s 1.3-mW/Gb/s Duobinary-Signal Transmitter Exploiting Power-Efficient Cross-Quadrature Clocking Multiplexers With Maximized Timing Margin.
IEEE Trans. Circuits Syst. I Regul. Pap., 2018

A W-Band Switch-Less Dicke Receiver for Millimeter-Wave Imaging in 65 nm CMOS.
IEEE Access, 2018

D-Band Surface-Wave Modulator and Signal Source with 40 dB Extinction Ratio and 3.7mW Output Power in 65 nm CMOS.
Proceedings of the 44th IEEE European Solid State Circuits Conference, 2018

2017
Editorial.
IEEE Trans. Very Large Scale Integr. Syst., 2017

Pole-Converging Intrastage Bandwidth Extension Technique for Wideband Amplifiers.
IEEE J. Solid State Circuits, 2017

2016
An on-chip integrated III-V / CMOS 125MSps 6-bit SAR ADC.
Proceedings of the International Symposium on Integrated Circuits, 2016

2015
Cell-Based Variable-Gain Amplifiers With Accurate dB-Linear Characteristic in 0.18 µm CMOS Technology.
IEEE J. Solid State Circuits, 2015

2014
A 57.9-to-68.3 GHz 24.6 mW Frequency Synthesizer With In-Phase Injection-Coupled QVCO in 65 nm CMOS Technology.
IEEE J. Solid State Circuits, 2014

Design and Analysis of a 2.4 GHz Hybrid Type Automatic amplitude Control VCO with Forward noise Reduction.
J. Circuits Syst. Comput., 2014

A case for leveraging 802.11p for direct phone-to-phone communications.
Proceedings of the International Symposium on Low Power Electronics and Design, 2014

2013
Cross-Coupled Current Conveyor Based CMOS Transimpedance Amplifier for Broadband Data Transmission.
IEEE Trans. Very Large Scale Integr. Syst., 2013

Design of a fully integrated CMOS dual K- and W-band lumped wilkinson power divider.
Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013

A 57.9-to-68.3GHz 24.6mW frequency synthesizer with in-phase injection-coupled QVCO in 65nm CMOS.
Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013

A low-noise amplifier with continuously-tuned input matching frequency and output resonance frequency.
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

2012
A Low-Power Single-Phase Clock Multiband Flexible Divider.
IEEE Trans. Very Large Scale Integr. Syst., 2012

A Dual-Loop Clock and Data Recovery Circuit With Compact Quarter-Rate CMOS Linear Phase Detector.
IEEE Trans. Circuits Syst. I Regul. Pap., 2012

A low power low phase noise dual-band multiphase VCO.
Microelectron. J., 2012

Implementations of Signal-Processing Algorithms for OFDM Systems.
J. Electr. Comput. Eng., 2012

A 100 GHz transformer-based varactor-less VCO with 11.2% tuning range in 65nm CMOS technology.
Proceedings of the 38th European Solid-State Circuit conference, 2012

Design of quarter-wavelength resonator filters with coupling controllable paths.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2012

2011
A 3.1-8 GHz CMOS UWB front-end receiver.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

2010
Design of a CMOS Broadband Transimpedance Amplifier With Active Feedback.
IEEE Trans. Very Large Scale Integr. Syst., 2010

A Wideband Low Power Low-Noise Amplifier in CMOS Technology.
IEEE Trans. Circuits Syst. I Regul. Pap., 2010

Design and Analysis of Ultra Low Power True Single Phase Clock CMOS 2/3 Prescaler.
IEEE Trans. Circuits Syst. I Regul. Pap., 2010

An Energy-Aware CMOS Receiver Front End for Low-Power 2.4-GHz Applications.
IEEE Trans. Circuits Syst. I Regul. Pap., 2010

A 1.8-V 3.6-mW 2.4-GHz fully integrated CMOS frequency synthesizer for IEEE 802.15.4.
Proceedings of the 18th IEEE/IFIP VLSI-SoC 2010, 2010

A 1.8-V 3.6-mW 2.4-GHz Fully Integrated CMOS Frequency Synthesizer for the IEEE 802.15.4.
Proceedings of the VLSI-SoC: Forward-Looking Trends in IC and Systems Design, 2010

A 1-V CMOS Ultralow-Power Receiver Front End for the IEEE 802.15.4 Standard Using Tuned Passive Mixer Output Pole.
Proceedings of the VLSI-SoC: Forward-Looking Trends in IC and Systems Design, 2010

A 1-V CMOS ultralow-power receiver front end for the IEEE 802.15.4 standard using tuned passive mixer output pole.
Proceedings of the 18th IEEE/IFIP VLSI-SoC 2010, 2010

2005
Fully integrated CMOS fractional-N frequency divider for wide-band mobile applications with spurs reduction.
IEEE Trans. Circuits Syst. I Regul. Pap., 2005

2004
RF CMOS low-phase-noise LC oscillator through memory reduction tail transistor.
IEEE Trans. Circuits Syst. II Express Briefs, 2004


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