Zhengnan Fu
Orcid: 0009-0009-1235-8521
According to our database1,
Zhengnan Fu authored at least 7 papers
between 2025 and 2026.
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Bibliography
2026
A 1024-Channel 0.8V 23.9-nW/Channel Event-Based Compute In-Memory Neural Spike Detector.
IEEE Trans. Biomed. Circuits Syst., June, 2026
A Reconfigurable Computing In-Memory Macro with Charge-sharing-based Weighted Accumulator.
CoRR, May, 2026
An Event-Driven E-Skin System with Dynamic Binary Scanning and real time SNN Classification.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2026
Live Demonstration: An Event-Driven E-Skin System with Dynamic Binary Scanning and real time SNN Classification.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2026
2025
A 33.6-136.2 TOPS/W Nonlinear Analog Computing-In-Memory Macro for Multi-bit LSTM Accelerator in 65 nm CMOS.
CoRR, December, 2025
High Energy-efficiency and Low latency In-Memory Computing using Analog Accumulator and In-Memory ADC with shared References.
Proceedings of the 62nd ACM/IEEE Design Automation Conference, 2025