Arindam Basu
Orcid: 0000-0003-1035-8770
According to our database1,
Arindam Basu
authored at least 144 papers
between 2004 and 2024.
Collaborative distances:
Collaborative distances:
Timeline
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
On csauthors.net:
Bibliography
2024
A Dynamic Gesture Recognition Algorithm Using Single Halide Perovskite Photovoltaic Cell for Human-Machine Interaction.
Proceedings of the International Conference on Electronics, Information, and Communication, 2024
2023
Guest Editorial Dynamical Neuro-AI Learning Systems: Devices, Circuits, Architecture and Algorithms.
IEEE J. Emerg. Sel. Topics Circuits Syst., December, 2023
Neuromorph. Comput. Eng., September, 2023
A 915-1220 TOPS/W, 976-1301 GOPS Hybrid In-Memory Computing Based Always-On Image Processing for Neuromorphic Vision Sensors.
IEEE J. Solid State Circuits, March, 2023
A 389 TOPS/W, Always ON Region Proposal Integrated Circuit Using In-Memory Computing in 65 nm CMOS.
IEEE J. Solid State Circuits, February, 2023
ANN vs SNN: A case study for Neural Decoding in Implantable Brain-Machine Interfaces.
CoRR, 2023
NeuroBench: Advancing Neuromorphic Computing through Collaborative, Fair and Representative Benchmarking.
CoRR, 2023
Tracking Fast by Learning Slow: An Event-based Speed Adaptive Hand Tracker Leveraging Knowledge in RGB Domain.
CoRR, 2023
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023
Architectural Exploration of Neuromorphic Compression based Neural Sensing for Next-Gen Wireless implantable-BMI.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023
2022
IEEE J. Solid State Circuits, 2022
EBBINNOT: A Hardware-Efficient Hybrid Event-Frame Tracker for Stationary Dynamic Vision Sensors.
IEEE Internet Things J., 2022
A 915-1220 TOPS/W Hybrid In-Memory Computing based Image Restoration and Region Proposal Integrated Circuit for Neuromorphic Vision Sensors in 65nm CMOS.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2022
Spiking Neural Network Integrated Circuits: A Review of Trends and Future Directions.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2022
Current Online Health Information Searching Practices of New Zealanders: Preliminary Results from a Pilot Study.
Proceedings of the Australasian Conference on Information Systems, 2022
2021
A 0.11-0.38 pJ/cycle Differential Ring Oscillator in 65 nm CMOS for Robust Neurocomputing.
IEEE Trans. Circuits Syst. I Regul. Pap., 2021
ACM J. Emerg. Technol. Comput. Syst., 2021
Introducing Recurrence in Strong PUFs for Enhanced Machine Learning Attack Resistance.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2021
DeepFreeze: Cold Boot Attacks and High Fidelity Model Recovery on Commercial EdgeML Device.
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2021
Proceedings of the International Conference on Electronics, Information, and Communication, 2021
WaC: First Results on Practical Side-Channel Attacks on Commercial Machine Learning Accelerator.
Proceedings of the ASHES@CCS 2021: Proceedings of the 5th Workshop on Attacks and Solutions in Hardware Security, 2021
A 389TOPS/W, 1262fps at 1Meps Region Proposal Integrated Circuit for Neuromorphic Vision Sensors in 65nm CMOS.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2021
2020
ADIC: Anomaly Detection Integrated Circuit in 65-nm CMOS Utilizing Approximate Computing.
IEEE Trans. Very Large Scale Integr. Syst., 2020
CRAM: Collocated SRAM and DRAM With In-Memory Computing-Based Denoising and Filling for Neuromorphic Vision Sensors in 65 nm CMOS.
IEEE Trans. Circuits Syst. II Express Briefs, 2020
ADEPOS: A Novel Approximate Computing Framework for Anomaly Detection Systems and its Implementation in 65-nm CMOS.
IEEE Trans. Circuits Syst. I Regul. Pap., 2020
Deep Neural Network for Respiratory Sound Classification in Wearable Devices Enabled by Patient Specific Model Tuning.
IEEE Trans. Biomed. Circuits Syst., 2020
ADIC: Anomaly Detection Integrated Circuit in 65nm CMOS utilizing Approximate Computing.
CoRR, 2020
A Hybrid Neuromorphic Object Tracking and Classification Framework for Real-time Systems.
CoRR, 2020
EBBINNOT: A Hardware Efficient Hybrid Event-Frame Tracker for Stationary Neuromorphic Vision Sensors.
CoRR, 2020
HyNNA: Improved Performance for Neuromorphic Vision Sensor Based Surveillance using Hybrid Neural Network Architecture.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020
Towards Autonomous Intra-Cortical Brain Machine Interfaces: Applying Bandit Algorithms for Online Reinforcement Learning.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020
Reducing Temperature Induced Unreliability in Sub-Threshold Strong PUFs through Circuit Modeling.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020
2019
A 2.86-TOPS/W Current Mirror Cross-Bar-Based Machine-Learning and Physical Unclonable Function Engine For Internet-of-Things Applications.
IEEE Trans. Circuits Syst. I Regul. Pap., 2019
Towards Intelligent Intracortical BMI (i<sup>2</sup>BMI): Low-Power Neuromorphic Decoders That Outperform Kalman Filters.
IEEE Trans. Biomed. Circuits Syst., 2019
IEEE Trans. Biomed. Circuits Syst., 2019
J. Low Power Electron., 2019
ADEPOS: A Novel Approximate Computing Framework for Anomaly Detection Systems and its Implementation in 65nm CMOS.
CoRR, 2019
CoRR, 2019
EBBIOT: A Low-complexity Tracking Algorithm for Surveillance in IoVT using Stationary Neuromorphic Vision Sensors.
Proceedings of the 32nd IEEE International System-on-Chip Conference, 2019
Proceedings of the 2019 9th International IEEE/EMBS Conference on Neural Engineering (NER), 2019
Proceedings of the 2019 9th International IEEE/EMBS Conference on Neural Engineering (NER), 2019
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019
Spiking Neural Network Based Region Proposal Networks for Neuromorphic Vision Sensors.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019
A Current Mirror Cross Bar Based 2.86-TOPS/W Machine Learner and PUF with <2.5% BER in 65nm CMOS for IoT Application.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019
A 0.16pJ/bit recurrent neural network based PUF for enhanced machine learning attack resistance.
Proceedings of the 24th Asia and South Pacific Design Automation Conference, 2019
ADEPOS: anomaly detection based power saving for predictive maintenance using edge computing.
Proceedings of the 24th Asia and South Pacific Design Automation Conference, 2019
Is my Neural Network Neuromorphic? Taxonomy, Recent Trends and Future Directions in Neuromorphic Engineering.
Proceedings of the 53rd Asilomar Conference on Signals, Systems, and Computers, 2019
2018
Current Mirror Array: A Novel Circuit Topology for Combining Physical Unclonable Function and Machine Learning.
IEEE Trans. Circuits Syst. I Regul. Pap., 2018
An Extreme Learning Machine-Based Neuromorphic Tactile Sensing System for Texture Recognition.
IEEE Trans. Biomed. Circuits Syst., 2018
Domain Wall Motion-Based Dual-Threshold Activation Unit for Low-Power Classification of Non-Linearly Separable Functions.
IEEE Trans. Biomed. Circuits Syst., 2018
IEEE Trans. Cogn. Dev. Syst., 2018
Spiking Neural Classifier with Lumped Dendritic Nonlinearity and Binary Synapses: A Current Mode VLSI Implementation and Analysis.
Neural Comput., 2018
Guest Editorial Low-Power, Adaptive Neuromorphic Systems: Devices, Circuit, Architectures and Algorithms.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2018
IEEE J. Emerg. Sel. Topics Circuits Syst., 2018
A 0.16pJ/bit Recurrent Neural Network Based PUF for Enhanced Machine Learning Atack Resistance.
CoRR, 2018
Power efficient Spiking Neural Network Classifier based on memristive crossbar network for spike sorting application.
CoRR, 2018
Proceedings of the 4th IEEE World Forum on Internet of Things, 2018
A Stacked Autoencoder Neural Network based Automated Feature Extraction Method for Anomaly detection in On-line Condition Monitoring.
Proceedings of the IEEE Symposium Series on Computational Intelligence, 2018
Proceedings of the 2018 International Joint Conference on Neural Networks, 2018
2017
IEEE Trans. Very Large Scale Integr. Syst., 2017
IEEE Trans. Neural Networks Learn. Syst., 2017
IEEE Trans. Neural Networks Learn. Syst., 2017
Hardware architecture for large parallel array of Random Feature Extractors applied to image recognition.
Neurocomputing, 2017
Low Power Implantable Spike Sorting Scheme Based on Neuromorphic Classifier with Supervised Training Engine.
Proceedings of the 2017 IEEE Computer Society Annual Symposium on VLSI, 2017
Current mirror array: A novel lightweight strong PUF topology with enhanced reliability.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017
Unsupervised learning of event-based image recordings using spike-timing-dependent plasticity.
Proceedings of the 2017 International Joint Conference on Neural Networks, 2017
Proceedings of the 2017 39th Annual International Conference of the IEEE Engineering in Medicine and Biology Society (EMBC), 2017
Cortical motor intention decoding on an analog co-processor with fast training for non-stationary data.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2017
A simultaneous neural recording and stimulation system using signal folding in recording circuits.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2017
2016
IEEE Trans. Neural Networks Learn. Syst., 2016
IEEE Trans. Biomed. Circuits Syst., 2016
IEEE Trans. Biomed. Circuits Syst., 2016
A 128-Channel Extreme Learning Machine-Based Neural Decoder for Brain Machine Interfaces.
IEEE Trans. Biomed. Circuits Syst., 2016
Neural Comput., 2016
Online unsupervised structural plasticity algorithm for multi-layer Winner-Take-All with binary synapses.
Proceedings of the International Symposium on Integrated Circuits, 2016
A low-voltage, low power STDP synapse implementation using domain-wall magnets for spiking neural networks.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016
2015
IEEE Trans. Neural Networks Learn. Syst., 2015
Hardware-Amenable Structural Learning for Spike-Based Pattern Classification Using a Simple Model of Active Dendrites.
Neural Comput., 2015
A 1 V, compact, current-mode neural spike detector with detection probability estimator in 65 nm CMOS.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015
A 128 channel 290 GMACs/W machine learning based co-processor for intention decoding in brain machine interfaces.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2015
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2015
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2015
2014
IEEE Trans. Very Large Scale Integr. Syst., 2014
Liquid State Machine With Dendritically Enhanced Readout for Low-Power, Neuromorphic VLSI Implementations.
IEEE Trans. Biomed. Circuits Syst., 2014
IEEE Trans. Biomed. Circuits Syst., 2014
A 0.7 V low-power fully programmable Gaussian function generator for brain-inspired Gaussian correlation associative memory.
Neurocomputing, 2014
Proceedings of the 2014 International Symposium on Integrated Circuits (ISIC), 2014
Improved margin multi-class classification using dendritic neurons with morphological learning.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014
Spike-timing dependent morphological learning for a neuron with nonlinear active dendrites.
Proceedings of the 2014 International Joint Conference on Neural Networks, 2014
Proceedings of the 2014 International Joint Conference on Neural Networks, 2014
2013
ACM Trans. Embed. Comput. Syst., 2013
A Learning-Enabled Neuron Array IC Based Upon Transistor Channel Models of Biological Phenomena.
IEEE Trans. Biomed. Circuits Syst., 2013
Neurocomputing, 2013
Working Solutions for Telehealth in Low Resource Areas.
Proceedings of the MEDINFO 2013, 2013
Morphological learning: Increased memory capacity of neuromorphic systems with binary synapses exploiting AER based reconfiguration.
Proceedings of the 2013 International Joint Conference on Neural Networks, 2013
Improving energy gains of <i>inexact</i> DSP hardware through <i>reciprocative error compensation</i>.
Proceedings of the 50th Annual Design Automation Conference 2013, 2013
Proceedings of the 2013 IEEE Biomedical Circuits and Systems Conference (BioCAS), Rotterdam, The Netherlands, October 31, 2013
Hardware efficient, neuromorphic dendritically enhanced readout for liquid state machines.
Proceedings of the 2013 IEEE Biomedical Circuits and Systems Conference (BioCAS), Rotterdam, The Netherlands, October 31, 2013
2012
Dynamical Systems Guided Design and Analysis of Silicon Oscillators for Central Pattern Generators.
IEEE Trans. Circuits Syst. I Regul. Pap., 2012
IEEE Trans. Biomed. Circuits Syst., 2012
A digitally assisted, pseudo-resistor-less amplifier in 65nm CMOS for neural recording applications.
Proceedings of the 55th IEEE International Midwest Symposium on Circuits and Systems, 2012
Proceedings of the 2012 IEEE Biomedical Circuits and Systems Conference, 2012
A low-power, reconfigurable smart sensor system for EEG acquisition and classification.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2012
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2012
2011
A Fully Integrated Architecture for Fast and Accurate Programming of Floating Gates Over Six Decades of Current.
IEEE Trans. Very Large Scale Integr. Syst., 2011
IEEE Trans. Circuits Syst. I Regul. Pap., 2011
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2011
2010
IEEE Trans. Circuits Syst. I Regul. Pap., 2010
IEEE Trans. Biomed. Circuits Syst., 2010
IEEE J. Solid State Circuits, 2010
Integrated low voltage and low power CMOS circuits for optical sensing of diffraction based micromachined microphone.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010
Live demonstration: Hardware and software infrastructure for a family of floating-gate based FPAAs.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010
2009
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009
Proceedings of the 46th Design Automation Conference, 2009
2008
IEEE Trans. Circuits Syst. I Regul. Pap., 2008
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008
Proceedings of the IEEE 2008 Custom Integrated Circuits Conference, 2008
2007
A Low-Power, Compact, Adaptive Logarithmic Transimpedance Amplifier Operating Over Seven Decades of Current.
IEEE Trans. Circuits Syst. I Regul. Pap., 2007
Design and Development of Standards (HL7 V3) Based Enterprise Architecture for Public Health Programs Integration at the County of Los Angeles.
Int. J. Heal. Inf. Syst. Informatics, 2007
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007
Above Threshold pFET InjectionModeling intended for ProgrammingFloating-Gate Systems.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007
2006
Proceedings of the IEEE 2006 Custom Integrated Circuits Conference, 2006
2005
Proceedings of the 18th International Conference on VLSI Design (VLSI Design 2005), 2005
2004
Sampled analog architecture for DCT and DST.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004
A fully programmable log-domain bandpass filter using multiple-input translinear elements.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004
Digital controlled analog architecture for DCT and DST using capacitor switching.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004
Proceedings of the 2004 IEEE International Conference on Acoustics, 2004