Zhiwei Zong

Orcid: 0000-0001-6748-2153

According to our database1, Zhiwei Zong authored at least 8 papers between 2019 and 2022.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

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Bibliography

2022
Design and Analysis of a 140-GHz T/R Front-End Module in 22-nm FD-SOI CMOS.
IEEE J. Solid State Circuits, 2022

2021
A Low-Power Reflection-Coefficient Sensor for 28-GHz Beamforming Transmitters in 22-nm FD-SOI CMOS.
IEEE J. Solid State Circuits, 2021

26.4 A Reflection-Coefficient Sensor for 28GHz Beamforming Transmitters in 22nm FD-SOI CMOS.
Proceedings of the IEEE International Solid-State Circuits Conference, 2021

2020
Low 1/f<sup>3</sup> Noise Corner LC-VCO Design Using Flicker Noise Filtering Technique in 22nm FD-SOI.
IEEE Trans. Circuits Syst. I Fundam. Theory Appl., 2020

Analysis of a 28-nm CMOS Fast-Lock Bang-Bang Digital PLL With 220-fs RMS Jitter for Millimeter-Wave Communication.
IEEE J. Solid State Circuits, 2020

A 28GHz Two-Way Current Combining Stacked-FET Power Amplifier in 22nm FD-SOI.
Proceedings of the 2020 IEEE Custom Integrated Circuits Conference, 2020

2019
A 22-29 GHz Voltage-Biased LC-VCO with Suppressed Flicker Noise over Tuning Range in 22nm FD-SOI.
Proceedings of the 17th IEEE International New Circuits and Systems Conference, 2019

A 22.5-27.7-GHz Fast-Lock Bang-Bang Digital PLL in 28-nm CMOS for Millimeter-Wave Communication With 220-fs RMS Jitter.
Proceedings of the 45th IEEE European Solid State Circuits Conference, 2019


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