Giuseppe Gramegna

According to our database, Giuseppe Gramegna authored at least 8 papers between 2001 and 2022.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2022

(Why do we need) Wireless Heterogeneous Integration (anyway?).

Michaël Peeters, S. Sinha, Xiao Sun, Claude Desset, Giuseppe Gramegna, John Slabbekoorn, Pieter Bex, N. Pinho, Tomas Webers, Dimitrios Velenis, A. Miller, Nadine Collaert, Geert Van der Plas, Eric Beyne, M. Huynen, R. Broucke

Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022

2021

A Low-Power Reflection-Coefficient Sensor for 28-GHz Beamforming Transmitters in 22-nm FD-SOI CMOS.

Yang Zhang, Giovanni Mangraviti, Johan Nguyen, Zhiwei Zong, Kamil Yavuz Kapusuz, Sam Lemey, Hendrik Rogier, Giuseppe Gramegna, Piet Wambacq

IEEE J. Solid State Circuits, 2021

InP / CMOS co-integration for energy efficient sub-THz communication systems.

Claude Desset, Nadine Collaert, Siddhartha Sinha, Giuseppe Gramegna

Proceedings of the IEEE Globecom 2021 Workshops, Madrid, Spain, December 7-11, 2021, 2021

2018

Session 26 overview: RF techniques for communication and sensing: RF subcommittee.

Giuseppe Gramegna, Hua Wang, Piet Wambacq

Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018

2006

A 56-mW 23-mm² single-chip 180-nm CMOS GPS receiver with 27.2-mW 4.1-mm² radio.

Giuseppe Gramegna, Philip G. Mattos, Marco Losi, Sabyasachi Das, Massimo Franciotta, Nino G. Bellantone, Michele Vaiana, Valentina Mandará, Mario Paparo

IEEE J. Solid State Circuits, 2006

2004

23mm² single-chip 0.18μm CMOS GPS receiver with 28mW-4.1 mm² radio and CPU/DSP/RAM/ROM.

Giuseppe Gramegna, Massimo Franciotta, Valentina Mandará, Nino G. Bellantone, Michele Vaiana, Mario Paparo, Marco Losi, Sabyasachi Das, Philip G. Mattos

Proceedings of the IEEE 2004 Custom Integrated Circuits Conference, 2004

2003

A 35-mW 3.6-mm2 fully integrated 0.18-μm CMOS GPS radio.

Giampiero Montagna, Giuseppe Gramegna, Ivan Bietti, Massimo Franciotta, Andrea Baschirotto, Placido De Vita, Roberto Pelleriti, Mario Paparo, Rinaldo Castello

IEEE J. Solid State Circuits, 2003

2001

A sub-1-dB NF±2.3-kV ESD-protected 900-MHz CMOS LNA.

Giuseppe Gramegna, Mario Paparo, Pietro G. Erratico, Placido De Vita

IEEE J. Solid State Circuits, 2001