Zhong-Lan Yang

According to our database, Zhong-Lan Yang authored at least 4 papers between 2000 and 2003.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2003

Hardware-Efficient Architecture Design for Zerotree Coding in MPEG-4 Still Texture Coder.

Chung-Jr Lian, Zhong-Lan Yang, Hao-Chieh Chang, Liang-Gee Chen

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2003

2001

A Programmable Parallel VLSI Architecture for 2-D Discrete Wavelet Transform.

Chien-Yu Chen, Zhong-Lan Yang, Tu-Chih Wang, Liang-Gee Chen

J. VLSI Signal Process., 2001

Hardware-efficient architecture design of tree-depth scanning and multiple quantization scheme for MPEG-4 still texture coding.

Hao-Chieh Chang, Zhong-Lan Yang, Chung-Jr Lian, Liang-Gee Chen

Proceedings of the 2001 International Symposium on Circuits and Systems, 2001

2000

A programmable VLSI architecture for 2-D discrete wavelet transform.

Chien-Yu Chen, Zhong-Lan Yang, Tu-Chih Wang, Liang-Gee Chen

Proceedings of the IEEE International Symposium on Circuits and Systems, 2000