Chung-Jr Lian

According to our database1, Chung-Jr Lian authored at least 24 papers between 2001 and 2008.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Links

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Bibliography

2008
Scalable video adaptation optimization using soft decision scheme.
Proceedings of the 2008 IEEE International Conference on Multimedia and Expo, 2008

2007
Word-Level Parallel Architecture of JPEG 2000 Embedded Block Coding Decoder.
IEEE Trans. Multim., 2007

On-Chip Memory Optimization Scheme for VLSI Implementation of Line-Based Two-Dimentional Discrete Wavelet Transform.
IEEE Trans. Circuits Syst. Video Technol., 2007

A Quality-of-Experience Video Adaptor for Serving Scalable Video Applications.
IEEE Trans. Consumer Electron., 2007

Reconfigurable architecture for video applications.
Proceedings of the 2007 IEEE International SOC Conference, 2007

2006
124Ms/s pixel-pipelined motion-JPEG 2000 codec without tile memory.
Proceedings of the 2006 IEEE International Solid State Circuits Conference, 2006

Hardware architecture design of an H.264/AVC video codec.
Proceedings of the 2006 Conference on Asia South Pacific Design Automation: ASP-DAC 2006, 2006

2005
Parallel embedded block coding architecture for JPEG 2000.
IEEE Trans. Circuits Syst. Video Technol., 2005

Application Layer Error Correction Scheme for Video Header Protection on Wireless Network.
Proceedings of the Seventh IEEE International Symposium on Multimedia (ISM 2005), 2005

System analysis of VLSI architecture for motion-compensated temporal filtering.
Proceedings of the 2005 International Conference on Image Processing, 2005

PEG, MPEG-4, and H.264 Codec IP Development.
Proceedings of the 2005 Design, 2005

2004
Novel precompression rate-distortion optimization algorithm for JPEG 2000.
Proceedings of the Visual Communications and Image Processing 2004, 2004

Architecture and Analysis of Color Structure Descriptor for Real-Time Video Indexing and Retrieval.
Proceedings of the Advances in Multimedia Information Processing - PCM 2004, 5th Pacific Rim Conference on Multimedia, Tokyo, Japan, November 30, 2004

2003
Analysis and architecture design of block-coding engine for EBCOT in JPEG 2000.
IEEE Trans. Circuits Syst. Video Technol., 2003

Hardware-Efficient Architecture Design for Zerotree Coding in MPEG-4 Still Texture Coder.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2003

High speed memory efficient EBCOT architecture for JPEG2000.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

Effective hardware-oriented technique for the rate control of JPEG2000 encoding.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

2002
Analysis of EBCOT decoding algorithm and its VLSI implementation for JPEG 2000.
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

Computation reduction technique for lossy JPEG2000 encoding through EBCOT Tier-2 feedback processing.
Proceedings of the 2002 International Conference on Image Processing, 2002

2001
Lifting based discrete wavelet transform architecture for JPEG2000.
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001

Analysis and architecture design of EBCOT for JPEG-2000.
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001

Hardware-efficient architecture design of tree-depth scanning and multiple quantization scheme for MPEG-4 still texture coding.
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001

Analysis and Architecture Design of JPEG2000.
Proceedings of the 2001 IEEE International Conference on Multimedia and Expo, 2001

Design and implementation of JPEG encoder IP core.
Proceedings of ASP-DAC 2001, 2001


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