Zhong-Lan Yang

According to our database1, Zhong-Lan Yang authored at least 4 papers between 2000 and 2003.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

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PhD thesis 
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Links

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Bibliography

2003
Hardware-Efficient Architecture Design for Zerotree Coding in MPEG-4 Still Texture Coder.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2003

2001
A Programmable Parallel VLSI Architecture for 2-D Discrete Wavelet Transform.
J. VLSI Signal Process., 2001

Hardware-efficient architecture design of tree-depth scanning and multiple quantization scheme for MPEG-4 still texture coding.
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001

2000
A programmable VLSI architecture for 2-D discrete wavelet transform.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000


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