Zizhang Luo

Orcid: 0000-0002-7276-2317

According to our database1, Zizhang Luo authored at least 10 papers between 2020 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2024
Rubick: A Unified Infrastructure for Analyzing, Exploring, and Implementing Spatial Architectures via Dataflow Decomposition.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., April, 2024

Cement: Streamlining FPGA Hardware Design with Cycle-Deterministic eHDL and Synthesis.
Proceedings of the 2024 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2024

2023
Automatic Generation of Spatial Accelerator for Tensor Algebra.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., June, 2023

Calabash: Accelerating Attention Using a Systolic Array Chain on FPGAs.
Proceedings of the 33rd International Conference on Field-Programmable Logic and Applications, 2023

Rubick: A Synthesis Framework for Spatial Architectures via Dataflow Decomposition.
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023

2021
Sanger: A Co-Design Framework for Enabling Sparse Attention using Reconfigurable Architecture.
Proceedings of the MICRO '21: 54th Annual IEEE/ACM International Symposium on Microarchitecture, 2021

Analyzing the Design Space of Spatial Tensor Accelerators on FPGAs.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2021

TENET: A Framework for Modeling Tensor Dataflow Based on Relation-centric Notation.
Proceedings of the 48th ACM/IEEE Annual International Symposium on Computer Architecture, 2021

TensorLib: A Spatial Accelerator Generation Framework for Tensor Algebra.
Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021

2020
Teaching Platform for Network Communication and Protocols Using a Micro: bit Based Wheeled Robot.
Proceedings of the 51st ACM Technical Symposium on Computer Science Education, 2020


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