Abhijit Karmakar

Orcid: 0000-0002-4681-1998

According to our database1, Abhijit Karmakar authored at least 28 papers between 2006 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

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Bibliography

2023
Real-time distributed video analytics for privacy-aware person search.
Comput. Vis. Image Underst., September, 2023

An RTL Implementation of the Data Encryption Standard (DES).
CoRR, 2023

2022
End-to-end person re-identification: Real-time video surveillance over edge-cloud environment.
Comput. Electr. Eng., 2022

2021
Online Speech Enhancement by Retraining of LSTM Using SURE Loss and Policy Iteration.
Neural Process. Lett., 2021

Smart surveillance system for real-time multi-person multi-camera tracking at the edge.
J. Real Time Image Process., 2021

Edge-based real-time face logging system for security applications.
Proceedings of the 12th International Conference on Computing Communication and Networking Technologies, 2021

2020
Closely-Coupled Lifting Hardware for Efficient DWT Computation in an SoC.
J. Signal Process. Syst., 2020

A Unified Architecture for AES/PRESENT Ciphers and its Usage in an SoC Environment.
Proceedings of the 11th IEEE Latin American Symposium on Circuits & Systems, 2020

2019
Hardware architectures for PRESENT block cipher and their FPGA implementations.
IET Circuits Devices Syst., 2019

Efficient Closely-Coupled Integration of AES Coprocessor with LEON3 Processor.
Proceedings of the VLSI Design and Test - 23rd International Symposium, 2019

An RNS Implementation of the Elliptic Curve Cryptography for IoT Security.
Proceedings of the First IEEE International Conference on Trust, 2019

2018
Homotopy optimisation based NMF for audio source separation.
IET Signal Process., 2018

A High-Performance and Area-Efficient VLSI Architecture for the PRESENT Lightweight Cipher.
Proceedings of the 31st International Conference on VLSI Design and 17th International Conference on Embedded Systems, 2018

A VLSI Architecture for the PRESENT Block Cipher with FPGA and ASIC Implementations.
Proceedings of the VLSI Design and Test - 22nd International Symposium, 2018

A High-Performance VLSI Architecture of the Present Cipher and its Implementations for SoCs.
Proceedings of the 31st IEEE International System-on-Chip Conference, 2018

2D-3D CNN Based Architectures for Spectral Reconstruction From RGB Images.
Proceedings of the 2018 IEEE Conference on Computer Vision and Pattern Recognition Workshops, 2018

2017
Efficient integration of coprocessor in LEON3 processor pipeline for System-on-Chip design.
Microprocess. Microsystems, 2017

An Efficient VLSI Architecture for PRESENT Block Cipher and Its FPGA Implementation.
Proceedings of the VLSI Design and Test - 21st International Symposium, 2017

A Lifting Instruction for Performing DWT in LEON3 Processor Based System-on-Chip.
Proceedings of the VLSI Design and Test - 21st International Symposium, 2017

2014
A perceptually motivated stationary wavelet packet filterbank using improved spectral over-subtraction for enhancement of speech in various noise environments.
Int. J. Speech Technol., 2014

2012
The spectral subtractive-type algorithms for enhancing speech in noisy environments.
Proceedings of the 1st International Conference on Recent Advances in Information Technology, 2012

An auditory perception based improved multi-band spectral subtraction algorithm for enhancement of speech degraded by non-stationary noises.
Proceedings of the 4th International Conference on Intelligent Human Computer Interaction, 2012

A perceptually motivated stationary wavelet packet filter-bank utilizing improved spectral over-subtraction algorithm for enhancing speech in non-stationary environments.
Proceedings of the 4th International Conference on Intelligent Human Computer Interaction, 2012

2011
Synthesis of an Optimal Wavelet Based on Auditory Perception Criterion.
EURASIP J. Adv. Signal Process., 2011

2007
Design of an Optimal Two-Channel Orthogonal Filterbank Using Semidefinite Programming.
IEEE Signal Process. Lett., 2007

Design of Optimal Wavelet Packet Trees Based on Auditory Perception Criterion.
IEEE Signal Process. Lett., 2007

Design of an Optimal Two-Channel Orthogonal Cyclic Filterbank Using Semidefinite Programming.
J. Sel. Topics Signal Processing, 2007

2006
A Multiresolution Model of Auditory Excitation Pattern and Its Application to Objective Evaluation of Perceived Speech Quality.
IEEE Trans. Speech Audio Process., 2006


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