Abhishek Moitra
Orcid: 0000-0002-0534-5206
According to our database1,
Abhishek Moitra authored at least 44 papers
between 2018 and 2026.
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Bibliography
2026
Proceedings of the Design, Automation & Test in Europe Conference, 2026
2025
DiffAxE: Diffusion-driven Hardware Accelerator Generation and Design Space Exploration.
CoRR, August, 2025
CoRR, March, 2025
ClipFormer: Key-Value Clipping of Transformers on Memristive Crossbars for Write Noise Mitigation.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., February, 2025
IEEE Trans. Emerg. Top. Comput., 2025
Proceedings of the Eighth Conference on Machine Learning and Systems, 2025
SITRA: Exploiting Temporal Silence in Spiking Transformers for Fast & Energy-efficient Inference.
Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2025
Rhychee-FL: Robust and Efficient Hyperdimensional Federated Learning with Homomorphic Encryption.
Proceedings of the Design, Automation & Test in Europe Conference, 2025
2024
MCAIMem: A Mixed SRAM and eDRAM Cell for Area and Energy-Efficient On-Chip AI Memory.
IEEE Trans. Very Large Scale Integr. Syst., November, 2024
IEEE Trans. Emerg. Top. Comput. Intell., August, 2024
IEEE Trans. Emerg. Top. Comput. Intell., April, 2024
When In-memory Computing Meets Spiking Neural Networks - A Perspective on Device-Circuit-System-and-Algorithm Co-design.
CoRR, 2024
Proceedings of the IEEE International Conference on Acoustics, 2024
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2024
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2024
Proceedings of the 61st ACM/IEEE Design Automation Conference, 2024
MINT: Multiplier-less INTeger Quantization for Energy Efficient Spiking Neural Networks.
Proceedings of the 29th Asia and South Pacific Design Automation Conference, 2024
2023
HyDe: A brid PCM/FeFET/SRAM vice-Search for Optimizing Area and Energy-Efficiencies in Analog IMC Platforms.
IEEE J. Emerg. Sel. Topics Circuits Syst., December, 2023
SpikeSim: An End-to-End Compute-in-Memory Hardware Evaluation Tool for Benchmarking Spiking Neural Networks.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., November, 2023
<i>XploreNAS</i>: Explore Adversarially Robust and Hardware-efficient Neural Architectures for Non-ideal Xbars.
ACM Trans. Embed. Comput. Syst., July, 2023
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., June, 2023
HyDe: A Hybrid PCM/FeFET/SRAM Device-search for Optimizing Area and Energy-efficiencies in Analog IMC Platforms.
CoRR, 2023
Sharing Leaky-Integrate-and-Fire Neurons for Memory-Efficient Spiking Neural Networks.
CoRR, 2023
XploreNAS: Explore Adversarially Robust & Hardware-efficient Neural Architectures for Non-ideal Xbars.
CoRR, 2023
Hardware Accelerators for Spiking Neural Networks for Energy-Efficient Edge Computing.
Proceedings of the Great Lakes Symposium on VLSI 2023, 2023
Examining the Role and Limits of Batchnorm Optimization to Mitigate Diverse Hardware-noise in In-memory Computing.
Proceedings of the Great Lakes Symposium on VLSI 2023, 2023
DeepCAM: A Fully CAM-based Inference Accelerator with Variable Hash Lengths for Energy-efficient Deep Neural Networks.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023
XPert: Peripheral Circuit & Neural Architecture Co-search for Area and Energy-efficient Xbar-based Computing.
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023
Input-Aware Dynamic Timestep Spiking Neural Networks for Efficient In-Memory Computing.
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023
Proceedings of the 57th Asilomar Conference on Signals, Systems, and Computers, ACSSC 2023, Pacific Grove, CA, USA, October 29, 2023
2022
Noise Sensitivity-Based Energy Efficient and Robust Adversary Detection in Neural Networks.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022
Examining the Robustness of Spiking Neural Networks on Non-ideal Memristive Crossbars.
Proceedings of the ISLPED '22: ACM/IEEE International Symposium on Low Power Electronics and Design, Boston, MA, USA, August 1, 2022
Rate Coding Or Direct Coding: Which One Is Better For Accurate, Robust, And Energy-Efficient Spiking Neural Networks?
Proceedings of the IEEE International Conference on Acoustics, 2022
MIME: adapting a single neural network for multi-task inference with memory-efficient dynamic pruning.
Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022
2021
DetectX - Adversarial Input Detection Using Current Signatures in Memristive XBar Arrays.
IEEE Trans. Circuits Syst. I Regul. Pap., 2021
Activation Density based Mixed-Precision Quantization for Energy Efficient Neural Networks.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021
2020
Circuits Syst. Signal Process., 2020
Exposing the Robustness and Vulnerability of Hybrid 8T-6T SRAM Memory Architectures to Adversarial Attacks in Deep Neural Networks.
CoRR, 2020
2018
Proceedings of the 2018 Conference on Design and Architectures for Signal and Image Processing, 2018