Abinash Roy

According to our database, Abinash Roy authored at least 18 papers between 2006 and 2022.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2022

SPROUT - Smart Power Routing Tool for Board-Level Exploration and Prototyping.

Rassul Bairamkulov, Abinash Roy, Mahalingam Nagarajan, Vaishnav Srinivas, Eby G. Friedman

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

2021

SPROUT - Smart Power ROUting Tool for Board-Level Exploration and Prototyping.

Rassul Bairamkulov, Abinash Roy, Mali Nagarajan, Vaishnav Srinivas, Eby G. Friedman

Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021

2020

Graph-Based Power Network Routing for Board-Level High Performance Systems.

Rassul Bairamkulov, Eby G. Friedman, Abinash Roy, Mali Nagarajan, Vaishnav Srinivas

Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

2019

Learning-based prediction of package power delivery network quality.

Yi Cao, Andrew B. Kahng, Joseph Li, Abinash Roy, Vaishnav Srinivas, Bangqi Xu

Proceedings of the 24th Asia and South Pacific Design Automation Conference, 2019

2010

Analysis of the Impacts of Signal Slew and Skew on the Behavior of Coupled RLC Interconnects for Different Switching Patterns.

Abinash Roy, Jingye Xu, Masud H. Chowdhury

IEEE Trans. Very Large Scale Integr. Syst., 2010

2008

Compound noise separation in digital circuits using blind source separation.

Jingye Xu, Vivek Nigam, Abinash Roy, Masud H. Chowdhury

Microelectron. J., 2008

Noise separation in analog integrated circuits using independent component analysis technique.

Jingye Xu, Abinash Roy, Masud H. Chowdhury

Integr. Comput. Aided Eng., 2008

Optimization technique for flip-flop inserted global interconnect.

Jingye Xu, Abinash Roy, Masud H. Chowdhury

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

Analysis of the impacts of signal rise/fall time and skew variations in coupled-RLC interconnects.

Abinash Roy, Masud H. Chowdhury

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

Impacts of signal slew and skew variations on delay uncertainty and crosstalk noise in coupled RLC global interconnects.

Abinash Roy, Jingye Xu, Masud H. Chowdhury

Proceedings of the 15th IEEE International Conference on Electronics, Circuits and Systems, 2008

2007

Power Consumption and BER of Flip-Flop Inserted Global Interconnect.

Jingye Xu, Abinash Roy, Masud H. Chowdhury

VLSI Design, 2007

Power Consumption Analysis of Flip-flop Based Interconnect Pipelining.

Jingye Xu, Abinash Roy, Masud H. Chowdhury

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

Delay and Clock Skew Variation due to Coupling Capacitance and Inductance.

Abinash Roy, Noha H. Mahmoud, Masud H. Chowdhury

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

Global Interconnect Optimization in the Presence of On-chip Inductance.

Abinash Roy, Masud H. Chowdhury

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

Accurate Analysis of Switching Patterns in High Speed On-chip Global Interconnects.

Abinash Roy, Sharada Jha, Masud H. Chowdhury

Proceedings of the 14th IEEE International Conference on Electronics, 2007

Interactive presentation: Analysis of power consumption and BER of flip-flop based interconnect pipelining.

Jingye Xu, Abinash Roy, Masud H. Chowdhury

Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007

Effects of Coupling Capacitance and Inductance on Delay Uncertainty and Clock Skew.

Abinash Roy, Noha H. Mahmoud, Masud H. Chowdhury

Proceedings of the 44th Design Automation Conference, 2007

2006

Impacts of Inductance on the Figures of Merit to Optimize Global Interconnect.

Abinash Roy, Masud H. Chowdhury

Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2006, 2006