Masud H. Chowdhury
Orcid: 0000000223418528Affiliations:
 University of Illinois at Chicago, USA
According to our database^{1},
Masud H. Chowdhury
authored at least 123 papers
between 2002 and 2022.
Collaborative distances:
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Bibliography
2022
Microelectron. J., 2022
ACM Comput. Surv., 2022
2021
SecNVM: Power SideChannel Elimination Using OnChip Capacitors for Highly Secure Emerging NVM.
IEEE Trans. Very Large Scale Integr. Syst., 2021
Microelectron. J., 2021
A Brief Overview of OnChip Voltage Regulation in HighPerformance and HighDensity Integrated Circuits.
IEEE Access, 2021
2020
Proceedings of the 63rd IEEE International Midwest Symposium on Circuits and Systems, 2020
Proceedings of the 11th IEEE Latin American Symposium on Circuits & Systems, 2020
An Implementation of External Capacitorless LowDropOut Voltage Regulator in 45nm Technology with Output Voltage Ranging from 0.4V1.2V.
Proceedings of the 38th IEEE International Conference on Computer Design, 2020
2019
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019
Design of Energy Efficient SRAM Cell Based on Double Gate SchottkyBarrierType GNRFET with Minimum Dimer Lines.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019
2018
Reliability and Energy Efficiency of the Tunneling TransistorBased 6T SRAM Cell in Sub10 nm Domain.
IEEE Trans. Circuits Syst. II Express Briefs, 2018
IEEE Trans. Circuits Syst. II Express Briefs, 2018
Investigation and Optimization of Spiral Inductor Design for OnChip Buck Converter.
J. Low Power Electron., 2018
Proceedings of the IEEE 61st International Midwest Symposium on Circuits and Systems, 2018
Proceedings of the IEEE 61st International Midwest Symposium on Circuits and Systems, 2018
A Disturb Free Read Port 8T SRAM Bitcell Circuit Design with Virtual Ground Scheme.
Proceedings of the IEEE 61st International Midwest Symposium on Circuits and Systems, 2018
Proceedings of the IEEE 61st International Midwest Symposium on Circuits and Systems, 2018
Capacitorless LowDropout Regulator (LDO) with Improved PSRR and Enhanced SlewRate.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
Failure Analysis of the Through Silicon Via in Threedimensional Integrated Circuit (3DIC).
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
2017
Analytical Models of HighSpeed RLC Interconnect Delay for Complex and Real Poles.
IEEE Trans. Very Large Scale Integr. Syst., 2017
IEEE Trans. Very Large Scale Integr. Syst., 2017
Microelectron. J., 2017
Electrical Nonlinearity Emulation Technique for CurrentControlled Memristive Devices.
IEEE Access, 2017
Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017
Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017
Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017
Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017
Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017
BPSK modulation based exact BER computation for network intrachip RF interconnect.
Proceedings of the 29th International Conference on Microelectronics, 2017
2016
Comprehensive doping scheme for MOSFETs in ultralowpower subthreshold circuits design.
Microelectron. J., 2016
Proceedings of the 29th IEEE International SystemonChip Conference, 2016
Innovative device source/drain and channel implantation for MOS transistors in ultra low power subthreshold circuit applications.
Proceedings of the 14th IEEE International New Circuits and Systems Conference, 2016
Proceedings of the IEEE 59th International Midwest Symposium on Circuits and Systems, 2016
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016
2015
Partially Depleted SilicononFerroelectric Insulator Field Effect Transistor Parametrization & Design Optimization for Minimum Subthreshold Swing.
Microelectron. J., 2015
Multilayer Graphene Nanoribbon and Carbon Nanotube Based Floating Gate Transistor for Nonvolatile Flash Memory.
ACM J. Emerg. Technol. Comput. Syst., 2015
CoRR, 2015
Optimization of ON current in multilayer Molybdenum Disulfide (MoS2) based tunnel field effect transistor.
Proceedings of the IEEE 58th International Midwest Symposium on Circuits and Systems, 2015
Proceedings of the IEEE 58th International Midwest Symposium on Circuits and Systems, 2015
Proceedings of the IEEE 58th International Midwest Symposium on Circuits and Systems, 2015
Proceedings of the IEEE 58th International Midwest Symposium on Circuits and Systems, 2015
Current voltage characteristics of Partially Depleted Silicon on Ferroelectric Insulator Field Effect Transistor (PDSOFFET).
Proceedings of the IEEE 58th International Midwest Symposium on Circuits and Systems, 2015
Proceedings of the IEEE 58th International Midwest Symposium on Circuits and Systems, 2015
Proceedings of the IEEE 58th International Midwest Symposium on Circuits and Systems, 2015
Partially depleted silicononferroelectric insulator field effect transistor (PDSOFFET).
Proceedings of the Sixteenth International Symposium on Quality Electronic Design, 2015
Performance analysis of through silicon via (TSV) and through glass via (TGV) for different materials.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015
Analysis of subthreshold swing in multichannel tunneling carbon nanotube field effect transistor (MTCNTFET).
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015
Proceedings of the 27th International Conference on Microelectronics, 2015
Proceedings of the 2015 IEEE International Conference on Electronics, 2015
Proceedings of the 2015 IEEE International Conference on Electronics, 2015
2014
Multilayer layer graphene nanoribbon flash memory: Analysis of programming and erasing operation.
Proceedings of the 27th IEEE International SystemonChip Conference, 2014
Proceedings of the 27th IEEE International SystemonChip Conference, 2014
Analysis of the currentvoltage characteristics of Silicon on Ferroelectric Insulator Field Effect Transistor (SOFFET).
Proceedings of the 27th IEEE International SystemonChip Conference, 2014
Neural network based classification of stressed speech using nonlinear spectral and cepstral features.
Proceedings of the IEEE 12th International New Circuits and Systems Conference, 2014
A new real pole delay model for RLC interconnect using second order approximation.
Proceedings of the IEEE 57th International Midwest Symposium on Circuits and Systems, 2014
Graphene and CNT based flash memory: Impacts of scaling control and tunnel oxide thickness.
Proceedings of the IEEE 57th International Midwest Symposium on Circuits and Systems, 2014
Proceedings of the IEEE 57th International Midwest Symposium on Circuits and Systems, 2014
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014
2013
Analysis of the properties of ZnO nanoparticle for emerging applications in nanoscale domains.
Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013
Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013
Silicon on ferroelectric insulator field effect transistor (SOFFET) for ultra low power design.
Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013
Implementation of active floating inductor based on second generation current conveyor for on chip voltage regulator.
Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013
Proceedings of the 20th IEEE International Conference on Electronics, 2013
Proceedings of the 20th IEEE International Conference on Electronics, 2013
Proceedings of the 2013 IEEE International 3D Systems Integration Conference (3DIC), 2013
2012
Proceedings of the 10th IEEE International NEWCAS Conference, 2012
Exploiting negative quantum capacitance of carbon nanotube FETs for low power applications.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012
2011
IEEE Trans. Very Large Scale Integr. Syst., 2011
IEEE Trans. Very Large Scale Integr. Syst., 2011
An Innovative PowerGating Technique for Leakage and Ground Bounce Control in SystemonaChip (SOC).
Circuits Syst. Signal Process., 2011
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011
Addressing crosstalk issue in onchip carbon nanotube interconnects using negative capacitance.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011
2010
Analysis of the Impacts of Signal Slew and Skew on the Behavior of Coupled RLC Interconnects for Different Switching Patterns.
IEEE Trans. Very Large Scale Integr. Syst., 2010
Energy efficiency of error control coding in intrachip RF/wireless interconnect systems.
Microelectron. J., 2010
2009
Investigation and a practical compact network model of thermal stress in integrated circuits.
Integr. Comput. Aided Eng., 2009
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009
Proceedings of the CSIE 2009, 2009 WRI World Congress on Computer Science and Information Engineering, March 31, 2009
2008
Microelectron. J., 2008
Noise separation in analog integrated circuits using independent component analysis technique.
Integr. Comput. Aided Eng., 2008
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2008
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008
Analysis of the impacts of signal rise/fall time and skew variations in coupledRLC interconnects.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008
Impacts of signal slew and skew variations on delay uncertainty and crosstalk noise in coupled RLC global interconnects.
Proceedings of the 15th IEEE International Conference on Electronics, Circuits and Systems, 2008
Proceedings of the 18th ACM Great Lakes Symposium on VLSI 2008, 2008
Proceedings of the 18th ACM Great Lakes Symposium on VLSI 2008, 2008
BER performance comparison between CDMA and UWB for RF/wireless interconnect application.
Proceedings of the 2008 IEEE International Conference on Electro/Information Technology, 2008
Proceedings of the 2008 IEEE International Conference on Electro/Information Technology, 2008
2007
VLSI Design, 2007
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007
Accurate Delay Estimation in the Presence of Coupling Noise using Complete Waveform Accuracy.
Proceedings of the 14th IEEE International Conference on Electronics, 2007
Accurate Analysis of Switching Patterns in High Speed Onchip Global Interconnects.
Proceedings of the 14th IEEE International Conference on Electronics, 2007
Proceedings of the 14th IEEE International Conference on Electronics, 2007
Proceedings of the 14th IEEE International Conference on Electronics, 2007
Interactive presentation: Analysis of power consumption and BER of flipflop based interconnect pipelining.
Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007
Effects of Coupling Capacitance and Inductance on Delay Uncertainty and Clock Skew.
Proceedings of the 44th Design Automation Conference, 2007
2006
IEEE Trans. Very Large Scale Integr. Syst., 2006
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006
Proceedings of the 13th IEEE International Conference on Electronics, 2006
Simultaneous Analysis of Capacitive Coupling and Leakage Noise in Nanometer Scale Circuits.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2006, 2006
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2006, 2006
Separation of Individual Noise Sources from Compound Noise Measurements in Digital Circuits.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2006, 2006
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2006, 2006
Prospects and Challenges of Handling Power Bus Modeling and Supply Noise in PackageChip C0design Approach.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2006, 2006
2005
Realizable reduction of interconnect circuits including self and mutual inductances.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2005
Engineering OverClocking: ReliabilityPerformance TradeOffs for HighPerformance Register Files.
Proceedings of the 2005 International Conference on Dependable Systems and Networks (DSN 2005), 28 June, 2005
2004
Proceedings of the 4th IEEE International Workshop on SystemonChip for RealTime Applications (IWSOC'04), 2004
Analysis of coupling noise and it's scalability in dynamic circuits [dynamic logic CMOS ICs].
Proceedings of the IEEE 2004 Custom Integrated Circuits Conference, 2004
2003
Proceedings of the 3rd IEEE International Workshop on SystemonChip for RealTime Applications (IWSOC'03), 30 June, 2003
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003
Proceedings of the 40th Design Automation Conference, 2003
2002
Performance analysis of deep sub micron VLSI circuits in the presence of self and mutual inductance.
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002