Adam C. Cabe

According to our database1, Adam C. Cabe authored at least 9 papers between 2006 and 2012.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2012
Tracking On-Chip Age Using Distributed, Embedded Sensors.
IEEE Trans. Very Large Scale Integr. Syst., 2012

2011
Experimental demonstration of standby power reduction using voltage stacking in an 8Kb embedded FDSOI SRAM.
Proceedings of the 21st ACM Great Lakes Symposium on VLSI 2010, 2011

2010
SRAM-based NBTI/PBTI sensor system design.
Proceedings of the 47th Design Automation Conference, 2010

Stacking SRAM banks for ultra low power standby mode operation.
Proceedings of the 47th Design Automation Conference, 2010

2009
Small embeddable NBTI sensors (SENS) for tracking on-chip performance decay.
Proceedings of the 10th International Symposium on Quality of Electronic Design (ISQED 2009), 2009

2007
Designing CMOS/molecular memories while considering device parameter variations.
ACM J. Emerg. Technol. Comput. Syst., 2007

Teaching Top-Down ASIC/SoC Design vs Bottom-Up Custom VLSI.
Proceedings of the IEEE International Conference on Microelectronic Systems Education, 2007

2006
A Design Methodology for a Low-Power, Temperature-Aware SoC Developed for Medical Image Processors.
Proceedings of the 2006 IEEE International SOC Conference, Austin, Texas, USA, 2006

Design approaches for hybrid CMOS/molecular memory based on experimental device data.
Proceedings of the 16th ACM Great Lakes Symposium on VLSI 2006, Philadelphia, PA, USA, April 30, 2006


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