Ahmed Kamaleldin
Orcid: 0000-0002-7446-7741
According to our database1,
Ahmed Kamaleldin
authored at least 13 papers
between 2017 and 2023.
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Bibliography
2023
PhD thesis, 2023
2022
AGILER: An Adaptive Heterogeneous Tile-Based Many-Core Architecture for RISC-V Processors.
IEEE Access, 2022
Proceedings of the International Conference on Field-Programmable Technology, 2022
A Hybrid Memory/Accelerator Tile Architecture for FPGA-based RISC-V Manycore Systems.
Proceedings of the 32nd International Conference on Field-Programmable Logic and Applications, 2022
2021
RV-CAP: Enabling Dynamic Partial Reconfiguration for FPGA-Based RISC-V System-on-Chip.
Proceedings of the IEEE International Parallel and Distributed Processing Symposium Workshops, 2021
Design For Agility: A Modular Reconfigurable Platform for Heterogeneous Many-Core Architectures.
Proceedings of the 31st International Conference on Field-Programmable Logic and Applications, 2021
2020
IEEE Access, 2020
2019
Proceedings of the 13th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2019
2018
Proceedings of the 16th IEEE International New Circuits and Systems Conference, 2018
Proceedings of the 7th International Conference on Modern Circuits and Systems Technologies, 2018
2017
A Cost-Effective Dynamic Partial Reconfiguration Implementation Flow for Xilinx FPGA.
Proceedings of the New Generation of CAS, 2017
A reconfigurable hardware platform implementation for software defined radio using dynamic partial reconfiguration on Xilinx Zynq FPGA.
Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017
Design guidelines for the high-speed dynamic partial reconfiguration based software defined radio implementations on Xilinx Zynq FPGA.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017