Ahmed Kamaleldin

According to our database, Ahmed Kamaleldin authored at least 23 papers between 2017 and 2026.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2026

ProCon-V: A Programmable Tightly Coupled Convolution Accelerator Based on RISC-V Custom Instructions for Edge Devices.

Ahmed Kamaleldin, Habib Aouinti, Diana Göhringer

IEEE Trans. Computers, May, 2026

MoSim: A Modular Simulation Framework for FPGA-based Systolic CNN Accelerators.

Jin Yuan, Zuwen Ou, Guangjin Li, Ahmed Kamaleldin, Diana Göhringer

Proceedings of the IEEE International Symposium on Circuits and Systems, 2026

A RISC-V Coprocessor to Accelerate Structured Sparse-Dense Matrix Multiplications.

Rohan Krishna Vijayaraghavan, Ahmed Kamaleldin, Pruthul Pradeep Andy, Diana Göhringer

Proceedings of the IEEE International Symposium on Circuits and Systems, 2026

2025

Exploring RISC-V Instruction-Level Optimization Through Macro-Operation Fusion for TensorFlow-based Models.

Ahmad Othman, Nico Röder, Ahmed Kamaleldin, Diana Göhringer

Proceedings of the 38th IEEE International System-on-Chip Conference, 2025

Quantized Semantic Segmentation for Efficient Spectrum Sensing on FPGAs.

Wegdan Ali, Ahmed Kamaleldin, Diana Göhringer, Mohamed A. Abd El Ghany

Proceedings of the 14th International Conference on Modern Circuits and Systems Technologies, 2025

A RISC-V Coprocessor for Seamless Integration of Stream-Based Accelerators.

Rohan Krishna Vijayaraghavan, Ahmed Kamaleldin, Matthias Nickel, Diana Göhringer

Proceedings of the 2025 IEEE International Parallel and Distributed Processing Symposium, 2025

Towards Instruction-Controlled In-Pipeline GEMM Acceleration in a Dual-Issue RISC-V Core for Edge Applications.

Ahmad Othman, Darmen Ilyas, Ahmed Kamaleldin, Diana Göhringer

Proceedings of the 35th International Conference on Field-Programmable Logic and Applications, 2025

Towards an Energy-Efficient RISC-V Core Architecture with Dynamic Dual-Issue and Clock Gating.

Ahmad Othman, Hueseyin Ege Pamuk, Ahmed Kamaleldin, Diana Göhringer

Proceedings of the 28th Euromicro Conference on Digital System Design, 2025

2024

Seamless Cache Extension for FPGA-based Multi-Core RISC-V SoC.

Ahmed Kamaleldin, Matthias Nickel, Sisi Wu, Diana Göhringer

Proceedings of the 37th IEEE International System-on-Chip Conference, 2024

AMPER-X: Adaptive Mixed-Precision RISC-V Core for Embedded Applications.

Ahmad Othman, Ahmed Kamaleldin, Diana Göhringer

Proceedings of the 2024 IEEE Nordic Circuits and Systems Conference (NorCAS), 2024

2023

A Modular Platform for Adaptive Heterogeneous Many-Core Architectures.

Ahmed Kamaleldin

PhD thesis, 2023

2022

AGILER: An Adaptive Heterogeneous Tile-Based Many-Core Architecture for RISC-V Processors.

Ahmed Kamaleldin, Diana Göhringer

IEEE Access, 2022

An Agile Tile-based Platform for Adaptive Heterogeneous Many-Core Systems.

Ahmed Kamaleldin, Diana Göhringer

Proceedings of the International Conference on Field-Programmable Technology, 2022

A Hybrid Memory/Accelerator Tile Architecture for FPGA-based RISC-V Manycore Systems.

Ahmed Kamaleldin, Diana Göhringer

Proceedings of the 32nd International Conference on Field-Programmable Logic and Applications, 2022

2021

RV-CAP: Enabling Dynamic Partial Reconfiguration for FPGA-Based RISC-V System-on-Chip.

Najdet Charaf, Ahmed Kamaleldin, Martin Thümmler, Diana Göhringer

Proceedings of the IEEE International Parallel and Distributed Processing Symposium Workshops, 2021

Design For Agility: A Modular Reconfigurable Platform for Heterogeneous Many-Core Architectures.

Ahmed Kamaleldin, Diana Göhringer

Proceedings of the 31st International Conference on Field-Programmable Logic and Applications, 2021

2020

Towards a Modular RISC-V Based Many-Core Architecture for FPGA Accelerators.

Ahmed Kamaleldin, Salma Hesham, Diana Göhringer

IEEE Access, 2020

2019

Modular Memory System for RISC-V Based MPSoCs on Xilinx FPGAs.

Ahmed Kamaleldin, Muhammad Ali, Pedram Amini Rad, Marcus Gottschalk, Diana Göhringer

Proceedings of the 13th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2019

2018

Utilizing Dynamic Partial Reconfiguration to Reduce the Cost of FPGA Debugging.

Islam Ahmed, Ahmed Kamaleldin, Hassan Mostafa, Ahmed Nader Mohieldin

Proceedings of the 16th IEEE International New Circuits and Systems Conference, 2018

Dynamically reconfigurable power efficient security for Internet of Things devices.

Khaled Khatib, Mostafa Ahmed, Ahmed Kamaleldin, Mohamed Abdelghany, Hassan Mostafa

Proceedings of the 7th International Conference on Modern Circuits and Systems Technologies, 2018

2017

A Cost-Effective Dynamic Partial Reconfiguration Implementation Flow for Xilinx FPGA.

Ahmed Kamaleldin, Islam Ahmed, Abdulfattah Mohammad Obeid, Ahmed Shalash, Yehea Ismail, Hassan Mostafa

Proceedings of the New Generation of CAS, 2017

A reconfigurable hardware platform implementation for software defined radio using dynamic partial reconfiguration on Xilinx Zynq FPGA.

Ahmed Kamaleldin, Sherif Hosny, Khaled Mohamed, Mostafa Gamal, Abdelrhman Hussien, Eslam Elnader, Ahmed Shalash, Abdelfattah Mohammad Obeid, Yehea Ismail, Hassan Mostafa

Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017

Design guidelines for the high-speed dynamic partial reconfiguration based software defined radio implementations on Xilinx Zynq FPGA.

Ahmed Kamaleldin, Ahmed M. Soliman, Ahmed Nagy, Youssef Gamal, Ahmed Shalash, Yehea Ismail, Hassan Mostafa

Proceedings of the IEEE International Symposium on Circuits and Systems, 2017