Ahmed S. Eissa

According to our database, Ahmed S. Eissa authored at least 4 papers between 2016 and 2018.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2018

RVNoC: A Framework for Generating RISC-V NoC-Based MPSoC.

Mahmoud A. Elmohr, Ahmed S. Eissa, Moamen Ibrahim, Mostafa Khamis, Sameh El-Ashry, Ahmed Shalaby, Mohamed Abdelsalam, M. Watheq El-Kharashi

Proceedings of the 26th Euromicro International Conference on Parallel, 2018

2017

A reusable verification environment for NoC platforms using UVM.

Ahmed S. Eissa, Moamen A. Ibrahem, Mahmoud A. Elmohr, Yasmin Zamzam, Ahmed El-Yamany, Sameh El-Ashry, Mostafa Khamis, Ahmed Shalaby

Proceedings of the IEEE EUROCON 2017 -17th International Conference on Smart Technologies, 2017

2016

Hardware implementation of a SHA-3 application-specific instruction set processor.

Mahmoud A. Elmohr, Mostafa A. Saleh, Ahmed S. Eissa, Khaled E. Ahmed, Mohammed M. Farag

Proceedings of the 28th International Conference on Microelectronics, 2016

SHA-3 Instruction Set Extension for A 32-bit RISC processor architecture.

Ahmed S. Eissa, Mahmoud A. Elmohr, Mostafa A. Saleh, Khaled E. Ahmed, Mohammed M. Farag

Proceedings of the 27th IEEE International Conference on Application-specific Systems, 2016