Sameh El-Ashry

Orcid: 0000-0002-6318-2919

According to our database1, Sameh El-Ashry authored at least 14 papers between 2013 and 2022.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Bibliography

2022
Emulation and verification framework for MPSoC based on NoC and RISC-V.
Des. Autom. Embed. Syst., December, 2022

2020
On Error Injection for NoC Platforms: A UVM-Based Generic Verification Environment.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

2018
RVNoC: A Framework for Generating RISC-V NoC-Based MPSoC.
Proceedings of the 26th Euromicro International Conference on Parallel, 2018

Fast Reliable Verification Methodology for RISC-V Without a Reference Model.
Proceedings of the 19th International Workshop on Microprocessor and SOC Test and Verification, 2018

Different Reference Models for UVM Environment to Speed Up the Verification Time.
Proceedings of the 19th International Workshop on Microprocessor and SOC Test and Verification, 2018

Efficient Methodology of Sampling UVM RAL During Simulation for SoC Functional Coverage.
Proceedings of the 19th International Workshop on Microprocessor and SOC Test and Verification, 2018

A Configurable RISC-V for NoC-Based MPSoCs: A Framework for Hardware Emulation.
Proceedings of the 11th International Workshop on Network on Chip Architectures, 2018

2017
On Error Injection for NoC Platforms: A UVM-based Practical Case Study.
Proceedings of the 10th International Workshop on Network on Chip Architectures, 2017

A reusable verification environment for NoC platforms using UVM.
Proceedings of the IEEE EUROCON 2017 -17th International Conference on Smart Technologies, 2017

2016
Coverage Closure Efficient UVM Based Generic Verification Architecture for Flash Memory Controllers.
Proceedings of the 17th International Workshop on Microprocessor and SOC Test and Verification, 2016

A narrative of UVM testbench environment for interconnection routers: A practical approach.
Proceedings of the 11th International Design & Test Symposium, 2016

A novel assertion-based CAD tool for automatic extraction of functional coverage.
Proceedings of the 28th International Conference on Microelectronics, 2016

2015
A functional coverage approach for direct testing: An industrial IP as a case study.
Proceedings of the IEEE EUROCON 2015, 2015

2013
Memory controller architectures: A comparative study.
Proceedings of the 8th International Design and Test Symposium, 2013


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