Akul Malhotra
Orcid: 0000-0002-6152-2377
According to our database1,
Akul Malhotra
authored at least 13 papers
between 2019 and 2025.
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Bibliography
2025
ReTern: Exploiting Natural Redundancy and Sign Transformations for Enhanced Fault Tolerance in Compute-in-Memory-Based Ternary LLMs.
IEEE Trans. Very Large Scale Integr. Syst., September, 2025
2024
BinSparX: Sparsified Binary Neural Networks for Reduced Hardware Non-Idealities in Xbar Arrays.
CoRR, 2024
SiTe CiM: Signed Ternary Computing-in-Memory for Ultra-Low Precision Deep Neural Networks.
CoRR, 2024
Memory Faults in Activation-sparse Quantized Deep Neural Networks: Analysis and Mitigation using Sharpness-aware Training.
CoRR, 2024
Fault Tolerant In-Memory Computing based on Emerging Technologies for Ultra-Low Precision Edge AI Accelerators.
Proceedings of the 43rd IEEE/ACM International Conference on Computer-Aided Design, 2024
BNN-Flip: Enhancing the Fault Tolerance and Security of Compute-in-Memory Enabled Binary Neural Network Accelerators.
Proceedings of the 29th Asia and South Pacific Design Automation Conference, 2024
2023
IEEE Trans. Circuits Syst. II Express Briefs, August, 2023
CoRR, 2023
TFix: Exploiting the Natural Redundancy of Ternary Neural Networks for Fault Tolerant In-Memory Vector Matrix Multiplication.
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023
2022
Proceedings of the IEEE International Test Conference, 2022
2019
Exploiting Oxide Based Resistive RAM Variability for Probabilistic AI Hardware Design.
CoRR, 2019
Proceedings of the 10th International Conference on Computing, 2019