Arnab Raha

According to our database, Arnab Raha authored at least 73 papers between 2011 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

PArtNNer: Platform-Agnostic Adaptive Edge-Cloud DNN Partitioning for Minimizing End-to-End Latency.

Soumendu Kumar Ghosh, Arnab Raha, Vijay Raghunathan, Anand Raghunathan

ACM Trans. Embed. Comput. Syst., January, 2024

DiagNNose: Toward Error Localization in Deep Learning Hardware-Based on VTA-TVM Stack.

Shamik Kundu, Suvadeep Banerjee, Arnab Raha, Suriyaprakash Natarajan, Kanad Basu

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., January, 2024

FlexNN: A Dataflow-aware Flexible Deep Learning Accelerator for Energy-Efficient Edge Devices.

Arnab Raha, Deepak A. Mathaikutty, Soumendu Kumar Ghosh, Shamik Kundu

CoRR, 2024

HARVEST: Towards Efficient Sparse DNN Accelerators using Programmable Thresholds.

Soumendu Kumar Ghosh, Shamik Kundu, Arnab Raha, Deepak A. Mathaikutty, Vijay Raghunathan

Proceedings of the 37th International Conference on VLSI Design and 23rd International Conference on Embedded Systems, 2024

2023

HIPED_AP: Energy-Efficient Hardware Accelerators for Hidden Periodicity Detection.

Arghadip Das, Chandrachur Majumder, Debaprasad De, Arnab Raha, Mrinal Kanti Naskar

IEEE Trans. Computers, October, 2023

Trouble-Shooting at GAN Point: Improving Functional Safety in Deep Learning Accelerators.

Shamik Kundu, Suvadeep Banerjee, Arnab Raha, Fei Su, Suriyaprakash Natarajan, Kanad Basu

IEEE Trans. Computers, August, 2023

Energy-Efficient Approximate Edge Inference Systems.

Soumendu Kumar Ghosh, Arnab Raha, Vijay Raghunathan

ACM Trans. Embed. Comput. Syst., July, 2023

A Novel Low-Power Compression Scheme for Systolic Array-Based Deep Learning Accelerators.

Ayush Arunachalam, Shamik Kundu, Arnab Raha, Suvadeep Banerjee, Suriyaprakash Natarajan, Kanad Basu

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., April, 2023

Analysis and Mitigation of DRAM Faults in Sparse-DNN Accelerators.

Shamik Kundu, Arnab Raha, Suvadeep Banerjee, Suriyaprakash Natarajan, Kanad Basu

IEEE Des. Test, April, 2023

VPU-EM: An Event-based Modeling Framework to Evaluate NPU Performance and Power Efficiency at Scale.

Charles Qi, Yi Wang, Hui Wang, Yang Lu, Shiva Shankar Subramanian, Finola Cahill, Conall Tuohy, Victor Li, Xu Qian, Darren Crews, Ling Wang, Shivaji Roy, Andrea Deidda, Martin Power, Niall Hanrahan, Rick Richmond, Umer Cheema, Arnab Raha, Alessandro Palla, Gary Baugh, Deepak Mathaikutty

CoRR, 2023

Enhanced ML-Based Approach for Functional Safety Improvement in Automotive AMS Circuits.

Ayush Arunachalam, Sanjay Das, Monikka Rajan, Fei Su, Xiankun Jin, Suvadeep Banerjee, Arnab Raha, Suriyaprakash Natarajan, Kanad Basu

Proceedings of the IEEE International Test Conference, 2023

2022

ENROUTE: An Entropy Aware Routing Scheme for Information-Centric Networks (ICN).

Bitan Banerjee, Sibendu Paul, Omar Alfandi, Arnab Raha, Amitava Mukherjee

Wirel. Pers. Commun., 2022

Exploring the Design of Energy-Efficient Intermittently Powered Systems Using Reconfigurable Ferroelectric Transistors.

Sandeep Krishna Thirumala, Arnab Raha, Sumeet Kumar Gupta, Vijay Raghunathan

IEEE Trans. Very Large Scale Integr. Syst., 2022

Special Session: Effective In-field Testing of Deep Neural Network Hardware Accelerators.

Shamik Kundu, Suvadeep Banerjee, Arnab Raha, Kanad Basu

Proceedings of the 40th IEEE VLSI Test Symposium, 2022

2.4GHz, Double-Buffered, 4kb Standard-Cell-Based Register File with Low-Power Mixed-Frequency Clocking for Machine Learning Accelerators.

Steven Hsu, Amit Agarwal, Mark A. Anders, Arnab Raha, Raymond Sung, Deepak Mathaikutty, Ram Krishnamurthy, James W. Tschanz, Vivek De

Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022

SCENIC: An Area and Energy-Efficient CNN-based Hardware Accelerator for Discernable Classification of Brain Pathologies using MRI.

Bodepu Sai Tirumala Naidu, Shreya Biswas, Rounak Chatterjee, Sayak Mandal, Srijan Pratihar, Ayan Chatterjee, Arnab Raha, Amitava Mukherjee, Janet Paluh

Proceedings of the 35th International Conference on VLSI Design and 2022 21st International Conference on Embedded Systems, 2022

RIBoNN: Designing Robust In-Memory Binary Neural Network Accelerators.

Shamik Kundu, Akul Malhotra, Arnab Raha, Sumeet Kumar Gupta, Kanad Basu

Proceedings of the IEEE International Test Conference, 2022

Unsupervised Learning-based Early Anomaly Detection in AMS Circuits of Automotive SoCs.

Ayush Arunachalam, Athulya Kizhakkayil, Shamik Kundu, Arnab Raha, Suvadeep Banerjee, Robert Jin, Fei Su, Kanad Basu

Proceedings of the IEEE International Test Conference, 2022

Fault Resilience of DNN Accelerators for Compressed Sensor Inputs.

Ayush Arunachalam, Shamik Kundu, Arnab Raha, Suvadeep Banerjee, Kanad Basu

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2022

2021

Improving Network Throughput by Hardware Realization of a Dynamic Content Caching Scheme for Information-Centric Networking (ICN).

Archisman Ghosh, Biswadeep Chakraborty, Arnab Raha, Amitava Mukherjee

Wirel. Pers. Commun., 2021

Toward Functional Safety of Systolic Array-Based Deep Learning Hardware Accelerators.

Shamik Kundu, Suvadeep Banerjee, Arnab Raha, Suriyaprakash Natarajan, Kanad Basu

IEEE Trans. Very Large Scale Integr. Syst., 2021

Design Considerations for Edge Neural Network Accelerators: An Industry Perspective.

Arnab Raha, Sang Kyun Kim, Deepak Mathaikutty, Guruguhanathan Venkataramanan, Debabrata Mohapatra, Raymond Sung, Cormac Brick, Gautham N. Chinya

Proceedings of the 34th International Conference on VLSI Design and 20th International Conference on Embedded Systems, 2021

HIPER: Low Power, High Performance and Area-Efficient Hardware Accelerators for Hidden Periodicity Detection using Ramanujan Filter Banks.

Arghadip Das, Chandrachur Majumder, Debaprasad De, Arnab Raha, Mrinal Kanti Naskar

Proceedings of the 34th International Conference on VLSI Design and 20th International Conference on Embedded Systems, 2021

PreSyNC: Hardware realization of the Presynaptic Region of a Biologically Extensive Neuronal Circuitry.

Rounak Chatterjee, Souradeep Chowdhury, Soham Mondal, Arnab Raha, Janet Paluh, Amitava Mukherjee

Proceedings of the 34th International Conference on VLSI Design and 20th International Conference on Embedded Systems, 2021

HardCompress: A Novel Hardware-based Low-power Compression Scheme for DNN Accelerators.

Ayush Arunachalam, Shamik Kundu, Arnab Raha, Suvadeep Banerjee, Suriyaprakash Natarajan, Kanad Basu

Proceedings of the 22nd International Symposium on Quality Electronic Design, 2021

Special Session: Approximate TinyML Systems: Full System Approximations for Extreme Energy-Efficiency in Intelligent Edge Devices.

Arnab Raha, Soumendu Kumar Ghosh, Debabrata Mohapatra, Deepak A. Mathaikutty, Raymond Sung, Cormac Brick, Vijay Raghunathan

Proceedings of the 39th IEEE International Conference on Computer Design, 2021

2020

Approximate Memory Compression.

Ashish Ranjan, Arnab Raha, Vijay Raghunathan, Anand Raghunathan

IEEE Trans. Very Large Scale Integr. Syst., 2020

Embedding Approximate Nonlinear Model Predictive Control at Ultrahigh Speed and Extremely Low Power.

Arnab Raha, Ankush Chakrabarty, Vijay Raghunathan, Gregery T. Buzzard

IEEE Trans. Control. Syst. Technol., 2020

Energy-Efficient IoT-Health Monitoring System using Approximate Computing.

Avrajit Ghosh, Arnab Raha, Amitava Mukherjee

Internet Things, 2020

Energy-Efficient Edge Detection using Approximate Ramanujan Sums.

Archisman Ghosh, K. Gaurav Kumar, Debaprasad De, Arnab Raha, Mrinal Kanti Naskar

Proceedings of the 21st International Symposium on Quality Electronic Design, 2020

Approximate inference systems (AxIS): end-to-end approximations for energy-efficient inference at the edge.

Soumendu Kumar Ghosh, Arnab Raha, Vijay Raghunathan

Proceedings of the ISLPED '20: ACM/IEEE International Symposium on Low Power Electronics and Design, 2020

IPS-CiM: Enhancing Energy Efficiency of Intermittently-Powered Systems with Compute-in-Memory.

Sandeep Krishna Thirumala, Arnab Raha, Vijay Raghunathan, Sumeet Kumar Gupta

Proceedings of the 38th IEEE International Conference on Computer Design, 2020

2019

Valley-Coupled-Spintronic Non-Volatile Memories with Compute-In-Memory Support.

Sandeep Krishna Thirumala, Yi-Tse Hung, Shubham Jain, Arnab Raha, Niharika Thakuria, Vijay Raghunathan, Anand Raghunathan, Zhihong Chen, Sumeet Kumar Gupta

CoRR, 2019

Non-volatile Logic and Memory based on Reconfigurable Ferroelectric Transistors.

Sandeep Krishna Thirumala, Arnab Raha, Vijaykrishnan Narayanan, Vijay Raghunathan, Sumeet Kumar Gupta

Proceedings of the IEEE/ACM International Symposium on Nanoscale Architectures, 2019

WSe2 based Valley-Coupled-Spintronic Devices for Low Power Non-Volatile Memories.

Sandeep Krishna Thirumala, T. Hung, Arnab Raha, Niharika Thakuria, K. Cho, Vijay Raghunathan, Zhihong Chen, S. Gupta

Proceedings of the Device Research Conference, 2019

Automatic Synthesis Techniques for Approximate Circuits.

Ashish Ranjan, Swagath Venkataramani, Shubham Jain, Younghoon Kim, Shankar Ganesh Ramasubramanian, Arnab Raha, Kaushik Roy, Anand Raghunathan

Proceedings of the Approximate Circuits, Methodologies and CAD., 2019

Approximate Systems: Synergistically Approximating Sensing, Computing, Memory, and Communication Subsystems for Energy Efficiency.

Arnab Raha, Vijay Raghunathan

Proceedings of the Approximate Circuits, Methodologies and CAD., 2019

2018

Approximating Beyond the Processor: Exploring Full-System Energy-Accuracy Tradeoffs in a Smart Camera System.

Arnab Raha, Vijay Raghunathan

IEEE Trans. Very Large Scale Integr. Syst., 2018

Designing Energy-Efficient Intermittently Powered Systems Using Spin-Hall-Effect-Based Nonvolatile SRAM.

Arnab Raha, Akhilesh Jaiswal, Syed Shakib Sarwar, Hrishikesh Jayakumar, Vijay Raghunathan, Kaushik Roy

IEEE Trans. Very Large Scale Integr. Syst., 2018

Memory-Based Combination PUFs for Device Authentication in Embedded Systems.

Soubhagya Sutar, Arnab Raha, Vijay Raghunathan

IEEE Trans. Multi Scale Comput. Syst., 2018

D-PUF: An Intrinsically Reconfigurable DRAM PUF for Device Authentication and Random Number Generation.

Soubhagya Sutar, Arnab Raha, Devadatta M. Kulkarni, Rajeev Shorey, Jeffrey D. Tew, Vijay Raghunathan

ACM Trans. Embed. Comput. Syst., 2018

Dual Mode Ferroelectric Transistor based Non-Volatile Flip-Flops for Intermittently-Powered Systems.

Sandeep Krishna Thirumala, Arnab Raha, Hrishikesh Jayakumar, Kaisheng Ma, Narayanan Vijaykrishnan, Vijay Raghunathan, Sumeet Kumar Gupta

Proceedings of the International Symposium on Low Power Electronics and Design, 2018

2017

Energy-Efficient Reduce-and-Rank Using Input-Adaptive Approximations.

Arnab Raha, Swagath Venkataramani, Vijay Raghunathan, Anand Raghunathan

IEEE Trans. Very Large Scale Integr. Syst., 2017

qLUT: Input-Aware Quantized Table Lookup for Energy-Efficient Approximate Accelerators.

Arnab Raha, Vijay Raghunathan

ACM Trans. Embed. Comput. Syst., 2017

Energy-Aware Memory Mapping for Hybrid FRAM-SRAM MCUs in Intermittently-Powered IoT Devices.

Hrishikesh Jayakumar, Arnab Raha, Jacob R. Stevens, Vijay Raghunathan

ACM Trans. Embed. Comput. Syst., 2017

Quality Configurable Approximate DRAM.

Arnab Raha, Soubhagya Sutar, Hrishikesh Jayakumar, Vijay Raghunathan

IEEE Trans. Computers, 2017

Synergistic Approximation of Computation and Memory Subsystems for Error-Resilient Applications.

Arnab Raha, Vijay Raghunathan

IEEE Embed. Syst. Lett., 2017

Approximate memory compression for energy-efficiency.

Ashish Ranjan, Arnab Raha, Vijay Raghunathan, Anand Raghunathan

Proceedings of the 2017 IEEE/ACM International Symposium on Low Power Electronics and Design, 2017

Towards Full-System Energy-Accuracy Tradeoffs: A Case Study of An Approximate Smart Camera System.

Arnab Raha, Vijay Raghunathan

Proceedings of the 54th Annual Design Automation Conference, 2017

Ultrafast embedded explicit model predictive control for nonlinear systems.

Arnab Raha, Ankush Chakrabarty, Vijay Raghunathan, Gregery T. Buzzard

Proceedings of the 2017 American Control Conference, 2017

2016

Input-Based Dynamic Reconfiguration of Approximate Arithmetic Units for Video Encoding.

Arnab Raha, Hrishikesh Jayakumar, Vijay Raghunathan

IEEE Trans. Very Large Scale Integr. Syst., 2016

Sleep-Mode Voltage Scaling: Enabling SRAM Data Retention at Ultra-Low Power in Embedded Microcontrollers.

Hrishikesh Jayakumar, Arnab Raha, Vijay Raghunathan

ACM Trans. Embed. Comput. Syst., 2016

Energy-Aware Memory Mapping for Hybrid FRAM-SRAM MCUs in IoT Edge Devices.

Hrishikesh Jayakumar, Arnab Raha, Vijay Raghunathan

Proceedings of the 29th International Conference on VLSI Design and 15th International Conference on Embedded Systems, 2016

D-PUF: an intrinsically reconfigurable DRAM PUF for device authentication in embedded systems.

Soubhagya Sutar, Arnab Raha, Vijay Raghunathan

Proceedings of the 2016 International Conference on Compilers, 2016

Energy-efficient system design for IoT devices.

Hrishikesh Jayakumar, Arnab Raha, Younghyun Kim, Soubhagya Sutar, Woo Suk Lee, Vijay Raghunathan

Proceedings of the 21st Asia and South Pacific Design Automation Conference, 2016

2015

QuickRecall: A HW/SW Approach for Computing across Power Cycles in Transiently Powered Computers.

Hrishikesh Jayakumar, Arnab Raha, Woo Suk Lee, Vijay Raghunathan

ACM J. Emerg. Technol. Comput. Syst., 2015

VIDalizer: An energy efficient video streamer.

Arnab Raha, Subrata Mitra, Vijay Raghunathan, Sanjay G. Rao

Proceedings of the 2015 IEEE Wireless Communications and Networking Conference, 2015

Quality configurable reduce-and-rank for energy efficient approximate computing.

Arnab Raha, Swagath Venkataramani, Vijay Raghunathan, Anand Raghunathan

Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

Quality-aware data allocation in approximate DRAM?

Arnab Raha, Hrishikesh Jayakumar, Soubhagya Sutar, Vijay Raghunathan

Proceedings of the 2015 International Conference on Compilers, 2015

2014

Trust integrated node potential aware routing for WSNs.

Shaik Sahil Babu, Arnab Raha, Omar Alfandi, Dieter Hogrefe, Mrinal Kanti Naskar

Int. J. Trust. Manag. Comput. Commun., 2014

A Power Efficient Video Encoder Using Reconfigurable Approximate Arithmetic Units.

Arnab Raha, Hrishikesh Jayakumar, Vijay Raghunathan

Proceedings of the 2014 27th International Conference on VLSI Design, 2014

QUICKRECALL: A Low Overhead HW/SW Approach for Enabling Computations across Power Cycles in Transiently Powered Computers.

Hrishikesh Jayakumar, Arnab Raha, Vijay Raghunathan

Proceedings of the 2014 27th International Conference on VLSI Design, 2014

Powering the internet of things.

Hrishikesh Jayakumar, Kangwoo Lee, Woo Suk Lee, Arnab Raha, Younghyun Kim, Vijay Raghunathan

Proceedings of the International Symposium on Low Power Electronics and Design, 2014

ASLAN: Synthesis of approximate sequential circuits.

Ashish Ranjan, Arnab Raha, Swagath Venkataramani, Kaushik Roy, Anand Raghunathan

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014

Hypnos: An ultra-low power sleep mode with SRAM data retention for embedded microcontrollers!

Hrishikesh Jayakumar, Arnab Raha, Vijay Raghunathan

Proceedings of the 2014 International Conference on Hardware/Software Codesign and System Synthesis, 2014

2012

A Simple Flood Forecasting Scheme Using Wireless Sensor Networks

Victor Seal, Arnab Raha, Shovan Maity, Souvik Kumar Mitra, Amitava Mukherjee, Mrinal Kanti Naskar

CoRR, 2012

Fuzzy Logic Election of Node for Routing in WSNs.

Shaik Sahil Babu, Arnab Raha, Mrinal Kanti Naskar, Omar Alfandi, Dieter Hogrefe

Proceedings of the 11th IEEE International Conference on Trust, 2012

A Novel Indirect Trust Based Link State Routing Scheme Using a Robust Route Trust Method for Wireless Sensor Networks.

Arnab Raha, Mrinal Kanti Naskar, Arpita Chakraborty, Omar Alfandi, Dieter Hogrefe

Proceedings of the 5th International Conference on New Technologies, 2012

An optimal sensor deployment scheme to ensure multi level coverage and connectivity in wireless sensor networks.

Arnab Raha, Shovan Maity, Mrinal Kanti Naskar, Omar Alfandi, Dieter Hogrefe

Proceedings of the 8th International Wireless Communications and Mobile Computing Conference, 2012

An efficient sleep protocol for lifetime enhancement in multi covered and multi connected WSNs.

Shovan Maity, Arnab Raha, Souvik Kumar Mitra, Victor Seal, Mrinal Kanti Naskar, Amitava Mukherjee

Proceedings of the 2012 International Conference on Advances in Computing, 2012

A fuzzy based trustworthy route selection method using LSRP in wireless sensor networks (FTRSP).

Arpita Chakraborty, Arnab Raha, Shovan Maity, Mrinal Kanti Naskar, Anupam Karmakar

Proceedings of the Second International Conference on Computational Science, 2012

2011

A Direct Trust dependent Link State Routing Protocol Using Route Trusts for WSNs (DTLSRP).

Shaik Sahil Babu, Arnab Raha, Mrinal K. Naskar

Wirel. Sens. Netw., 2011

Trust integrated link state routing protocol for Wireless Sensor Networks (TILSRP).

Arnab Raha, Shaik Sahil Babu, Mrinal Kanti Naskar, Omar Alfandi, Dieter Hogrefe

Proceedings of the Fifth IEEE International Conference on Advanced Telecommunication Systems and Networks, 2011