Ali Dadashi
According to our database1,
Ali Dadashi
authored at least 13 papers
between 2009 and 2019.
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Bibliography
2019
A Fast-Lock, Low Jitter, High-Speed Half-Rate CDR Architecture with a Composite Phase Detector (CPD).
Proceedings of the 26th International Conference on Mixed Design of Integrated Circuits and Systems, 2019
Proceedings of the 26th International Conference on Mixed Design of Integrated Circuits and Systems, 2019
Proceedings of the 26th International Conference on Mixed Design of Integrated Circuits and Systems, 2019
A New High-speed and Low area Efficient Pipelined 128-bit Adder Based on Modified Carry Look-ahead Merging with Han-Carlson Tree Method.
Proceedings of the 26th International Conference on Mixed Design of Integrated Circuits and Systems, 2019
A 4.5 fJ/conversion-step 10-bit 0.6V Asynchronous SAR ADC for Battery-free Miniature Sensor Nodes in 65nm CMOS.
Proceedings of the 26th International Conference on Mixed Design of Integrated Circuits and Systems, 2019
2016
Erratum: User Interface Problems of a Nationwide Inpatient Information System: A Heuristic Evaluation.
Appl. Clin. Inform., 2016
User Interface Problems of a Nationwide Inpatient Information System: A Heuristic Evaluation.
Appl. Clin. Inform., 2016
High-speed dynamic dual-rail ultra low voltage static CMOS logic operating at 300 mV.
Proceedings of the 2016 International Conference on Design and Technology of Integrated Systems in Nanoscale Era, 2016
2015
Proceedings of the 2015 IEEE Computer Society Annual Symposium on VLSI, 2015
Novel high-speed dynamic differential ultra low voltage logic for supply-voltage below 300 mV.
Proceedings of the 2015 IEEE International Conference on Electronics, 2015
Proceedings of the 2015 IEEE International Conference on Electronics, 2015
2013
Int. J. Circuit Theory Appl., 2013
2009
Proceedings of the 19th European Conference on Circuit Theory and Design, 2009